MX27L4000 Datasheet, PDF (1/15 Pages) Macronix International – 4M-BIT [512K x8] LOW VOLTAGE OPERATION CMOS EPROM

FEATURES
• 512K x 8 organization
• Wide voltage range, 2.7V to 3.6V
• +12.5V programming voltage
• Fast access time: 200/250ns
• Totally static operation
• Completely TTL compatible
MX27L4000
4M-BIT [512K x8] LOW VOLTAGE OPERATION
CMOS EPROM
• Operating current: 20mA @ 3.6V, 5MHz
• Standby current: 50uA
• Package type:
- 32 pin plastic DIP
- 32 pin PLCC/SOP
- 32pin TSOP
GENERAL DESCRIPTION
The MX27L4000 is a 4M-bit, One Time Programmable
Read Only Memory. It is organized as 512K words by 8
bits per word, operates from a single +3 volt supply, has
a static standby mode, and features fast single address
location programming. All programming signals are TTL
levels, requiring a single pulse. For programming out-
side from the system, existing EPROM programmers
may be used. The MX27L4000 supports a intelligent fast
programming algorithm which can result in programming
time of less than two minutes.
This EPROM is packaged in industry standard 32 pin
dual-in-line packages, 32 lead PLCC, 32 lead SOP, and
32 lead TSOP(I) packages.
PIN CONFIGURATIONS
32 PDIP/SOP
32 PLCC
32TSOP
VPP 1
A16 2
A15 3
A12 4
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A0 12
Q0 13
Q1 14
Q2 15
GND 16
32 VCC
31 A18
30 A17
29 A14
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 Q7
20 Q6
19 Q5
18 Q4
17 Q3
A11
1
4
A7 5
A6
A9
2
1 32
30
29 ^A14
A8
3
A13
4
A13
A14
5
A5
A8
A17
6
A4
A9
A18
7
VCC
8
A3 9
MX27L4000 ^{25 A11} VPP
9
A2
OE
A16
10
A15
11
A1
A10
A12
12
A0
CE
A7
13
Q0 ¹³
14
17
21 Q7
20
A6
A5
14
15
A4
16
MX27L4000
32
OE
31
A10
30
CE
29
Q7
28
Q6
27
Q5
26
Q4
25
Q3
24
GND
23
Q2
22
Q1
21
Q0
20
A0
19
A1
18
A2
17
A3
BLOCK DIAGRAM
CE
CONTROL
OE
LOGIC
OUTPUT
BUFFERS
.
.
.
A0~A18
.
ADDRESS
.
INPUTS
.
.
.
Y-DECODER
.
.
.
.
.
X-DECODER
.
.
.
VCC
VPP
VSS
P/N: PM00255
Y-SELECT
4M BIT
CELL
MAXTRIX
PIN DESCRIPTION
Q0~Q7
SYMBOL
PIN NAME
A0~A18
Address Input
Q0~Q7
Data Input/Output
CE
Chip Enable Input
OE
Output Enable Input
VPP
Program Supply Voltage
VCC
Power Supply Pin
GND
Ground Pin
1
REV. 2.7, AUG. 26, 2003