MX27C4111 Datasheet, PDF (1/15 Pages) Macronix International – 4M-BIT [512K x8/256K x16] CMOS EPROM WITH PAGE MODE

FEATURES
• With Page Mode function, 8-word/16-byte page
• 512K x 8 or 256K x 16 organization
• +12.5V programming voltage
• Fast access time: 90/100/120/150 ns
• Page mode access time 50/60/75 ns
• Totally static operation
PRELIMINARY
MX27C4111
4M-BIT [512K x8/256K x16] CMOS EPROM
WITH PAGE MODE
• Completely TTL compatible
• Operating current: 60mA
• Standby current: 100uA
• Package type:
- 40 pin plastic DIP
- 40 pin SOP
GENERAL DESCRIPTION
The MX27C4111 is a 4M-bit, One Time Programmable
Read Only Memory with page mode. It is organized as
512K x 8 or 256K x 16, operates from a single + 5 volt
supply, has a static standby mode, and features fast
single address location programming. All programming
signals are TTL levels, requiring a single pulse. For
programming outside from the system, existing EPROM
programmers may be used. The MX27C4111 supports
a intelligent fast programming algorithm which can result
in programming time of less than two minutes.
MX27C4111 provides Page Read Access Mode which
can greatly reduce the read access time. Normal read
access time and Page Mode read access time is as fast
as 90/50ns. It is designed to be compatible with all
microprocessors and similar applications in which high
perofmrance, large bit storage and simple interfacing
are important design considerations.
This EPROM is packaged in industry standard 40 pin
dual-in-line packages and 40 pin SOP packages.
PIN CONFIGURATIONS
PDIP/SOP
A17 1
A7 2
A6 3
A5 4
A4 5
A3 6
A2 7
A1 8
A0 9
CE 10
GND 11
OE 12
Q0 13
Q8 14
Q1 15
Q9 16
Q2 17
Q10 18
Q3 19
Q11 20
40 A8
39 A9
38 A10
37 A11
36 A12
35 A13
34 A14
33 A15
32 A16
31 BYTE/VPP
30 GND
29 Q15/A-1
28 Q7
27 Q14
26 Q6
25 Q13
24 Q5
23 Q12
22 Q4
21 VCC
BLOCK DIAGRAM
CE
OE
BYTE/VPP
CONTROL
LOGIC
OUTPUT
BUFFERS
.
.
.
A0~A17
.
ADDRESS
.
INPUTS
.
.
.
VCC
GND
Y-DECODER
.
.
.
.
.
X-DECODER
.
.
.
Y-SELECT
4M BIT
CELL
MAXTRIX
Q0~Q14
Q15/A-1
P/N: PM0239
REV. 2.7, NOV. 19, 2002
1