88W8787 Datasheet, PDF (1/4 Pages) –

series
Marvell Avastar 88W8787 SoC
WLAN/Bluetooth/FM Single-Chip SoC
PRODUCT OVERVIEW
The Marvell^® Avastar™ 88W8787 is a highly integrated system-on-a-chip (SoC), specifically designed to support high
throughput data rates for next-generation products. The Marvell Avastar family of wireless devices delivers best-in-
class single-function and multi-function radios for the entire spectrum of always-on consumer electronics devices.
The Marvell Avastar 88W8787 SoC is designed for both simultaneous and independent operation of the following:
• IEEE 802.11a/g/b and 802.11n payload data rates for Wireless Local Area Network (WLAN)
• Bluetooth 3.0 + High Speed (HS) (also compliant with Bluetooth 2.1 + EDR)
• FM transmit and receive (digital encoder/decoder FM radio with RDS/RBDS)
The device supports the 802.11i security standard through implementation of the Advanced Encryption Standard
(AES)/Counter Mode CBC-MAC Protocol (CCMP), Wired Equivalent Privacy (WEP) with Temporal Key Integrity Protocol
(TKIP), Advanced Encryption Standard (AES)/Cipher-Based Message Authentication Code (CMAC), and WLAN
Authentication and Privacy Infrastructure (WAPI) security mechanisms.
For video, voice, and multimedia applications, 802.11e Quality of Service (QoS) is supported. The device also supports
802.11h Dynamic Frequency Selection (DFS) for detecting radar pulses when operating in the 5 GHz range.
The 88W8787 supports generic interfaces including SDIO, G-SPI, high-speed UART, and PCM for connecting WLAN,
Bluetooth, and FM to the host processor. For FM Tx/Rx, the device supports Inter-IC Sound (I2S) / analog stereo audio
interfaces. An I2C-compatible interface is available to connect FM Tx/Rx to the host processor, as well. FM Tx/Rx can
also share the host interface with Bluetooth.
The device is also equipped with a coexistence interface for external, co-located 2.4 GHz radios.
Available packaging includes a TFBGA or CSP flip chip option.
BLOCK DIAGRAM
JTAG Interface
Power Management
Battery/Low Voltage LDO
Power Down
I ²S/PCM
RF Input
RF Output
Sleep Clock
I ²S Audio Codec Interface
3-Wire,4-Wire Interface
2-Wire Serial Interface
1-Wire Serial Interface
Serial EEPROM
GPIO
Processor
Marvell
Feroceon
CPU
ROM
JTAG
CPU
Interface
Timers/
Interrupts
Power
Management
Bluetooth
Bluetooth
Baseband
FM Tx/Rx
FM RF
Interface
FM RF
Audio Interface
Audio Codec
Controller
Peripheral Bus
C
LDO
P
U
B
U
S
Encrycption
SRAM
DMA
Clocked
Serial Unit
GPIO/LED
B
U
Peripheral Bus Unit
S
WLAN MAC/Baseband
802.11
MAC
Coexistence
Arbiter
802.11
Baseband
(DSSS/OFDM)
Bluetooth DSP
I
N
T
E
R
N
A
L
B
U
S
Host Interfaces
SDIO
G-SPI
UART
I ^{2C-Compatible}
Direct Conversion RF
WLAN RF
Shared
LNA
LNA
LNA
Bluetooth RF
LNA
5 GHz WLAN Rx
5 GHz WLAN Tx
5 GHz External PA
WLAN/Bluetooth Rx
WLAN Tx
2.4 GHz External PA
SP3T
Bluetooth Tx/Rx
Common Analog
Common Analog Unit
XTAL_IN
XTAL_OUT
Coexistence Interface
(external co-located 2.4 GHz radio)
SDIO
G-SPI
High Speed UART
I ^{2C-compatible} (slave from Host)
Fig 1. Avastar 88W8787 SoC Block Diagram ¹
1. Antenna can be used as an option to enhance performance