88W8782U Datasheet, PDF (1/4 Pages) –

series
Marvell Avastar 88W8782U WLAN SoC
Supports a USB 2.0 Interface for Connecting WLAN Activity
to the Host Processor
PRODUCT OVERVIEW
The Marvell^® Avastar™ 88W8782U is a highly integrated wireless local area network (WLAN) system-on-chip (SoC),
specifically designed to support high throughput data rates for next generation WLAN products and is part of the
Marvell Avastar family of wireless devices. The Avastar family includes single-function and multi-function radios that
establish new industry benchmarks for power consumption, wireless performance, solution footprint and
advanced features.
The Marvell Avastar 88W8782U is designed to support IEEE 802.11a/g/b and 802.11n payload data rates. The device
provides the combined functions of Direct Sequence Spread Spectrum (DSSS) and Orthogonal Frequency Division
Multiplexing (OFDM) baseband modulation, Medium Access Controller (MAC), CPU, memory, host interfaces, and
direct-conversion WLAN RF radio on a single integrated chip.
For security, the 88W8782U supports 802.11i security standards through implementation of the Advanced Encryp-
tion Standard (AES)/Counter Mode CBC-MAC Protocol (CCMP), Wired Equivalent Privacy (WEP) with Temporal Key
Integrity Protocol (TKIP), Advanced Encryption Standard (AES)/Cipher-Based Message Authentication Code (CMAC),
and WLAN Authentication and Privacy Infrastructure (WAPI) security mechanisms.
For video, voice, and multimedia applications, 802.11e Quality of Service (QoS) is supported. Also supported are
802.11h Dynamic Frequency Selection (DFS) for detecting radar pulses when operating in the 5 GHz range.
The device is also equipped with a coexistence interface for external, co-located 2.4 GHz radios.
The 88W8782U supports a USB 2.0 interface for connecting WLAN activity to the host processor. The device is avail-
able in a QFN package option.
BLOCK DIAGRAM
JTAG Interface
Power Management
Power Down
Sleep Clock
LDOs
3-Wire, 4-Wire Interface
2-Wire Serial Interface
1-Wire Serial Interface
Serial EEPROM
UART
GPIO
Encrycption
Processor
C
P
U
Feroceon
SRAM /
CPU
ROM
B
U
S
JTAG
SRAM
CPU
Interface
Timers /
Interrupts
Power
Management
Peripheral Bus
Clocked
Serial Unit
B
UART
U
S
GPIO/LED
OTP
LDO
Peripheral Bus Unit
WLAN MAC / Baseband
802.11
MAC
Coexistence
Arbiter
802.11
Baseband
(DSSS/OFDM)
Direct Conversion RF
PA
WLAN RF
LNA
PA
LNA
T/R
Switch
I
N
T
E
R
N
Common Analog
A
L
DMA
Common Analog Unit
B
U
S
Host Interface
USB
TT//RR
Switch
5 GHz WLAN Tx
5 GHz WLAN Rx
2.4 GHz WLAN Tx/Rx
Coexistence Interface
XTAL_IN
XTAL_OUT
REF_CLK_OUT
USB 2.0
Fig 1. Avastar 88W8782U SoC Block Diagram