8020 Datasheet, PDF (1/2 Pages) Filtran LTD – T1/E1 Extended Temperature Range SMD Single Transformers

Marvell ARMADA 8020 Dual-Core CA72 Processor
with Marvell MoChi and FLC Architecture
High-Performance Multi-Core CPU System on Chip
PRODUCT OVERVIEW
The Marvell® ARMADA® 8020 (88F8020) is a complete system-on-chip (SoC) solution based on the latest
ARMv8 high-performance CPU technology, ideally suited for a wide range of SoHo, SMB and Enterprise class
applications. The first two products of the ARMADA® 8K Family, the Armada® 8020 and the Armada® 8040
include, respectively, a dual-core and a quad-core ARM Cortex-A72, bringing a high level of performance,
integration, and efficiency, and raising the performance per Watt and performance per cost bar.
88F8020 built as part of Marvell’s MoChi family of products. As the MCi interface is essentially transparent to
the driver, all the connected MCi will appear to the driver as though it is an integrated function in the 88F8020
itself, enabling a Virtual System-on-Chip (vSoC).
The 88F8020 implements the Marvell innovative Final Level Cache (FLC) architecture and technology. With
FLC, the DRAM is introduced to the system as a very large cache layer, complemented by a subsequent
hierarchy of cheaper, slower memory (e.g SSD Flash). To allow lower latency to the DRAM cache, the
88F8020 may be integrate (MCM) with an in-package memory such as LPDDR4 minimizing the access time
and reducing overall system power. The capacity of the in-package memory may be fine-tuned according to the
application needs.
Utilizing advanced caching algorithm the 88F8020 FLC technology is capable of shielding the vast majority of
the on-going memory traffic with the in-package memory, very rarely accesses the subsequent, slower memory
hierarchy in real time. Utilizing FLC technology in the system architecture allows lower overall costs, lower
power consumption and simpler board design.
The 88F8020 also supports standard high speed DDR4 interface in 64 and 32b bus widths, with optional ECC
function.
BLOCK DIAGRAM
DDR Controller
DMA
DMA
DMA
Marvell^® ARMADA^® 8020
ARM Cortex A72 CPU ARM Cortex A72 CPU
up to 2 GHz
up to 2 GHz
32 KB L1 48KB L1
32 KB L1 48KB L1
D-Cache I-Cache
D-Cache I-Cache
512 KB L2 Cache
DMA
1 MB Shared L3 Cache
Aurora2™ Coherency Fabric SMMU
PCIe 3.0x1
PCIe 3.0x4
PCIe 3.0x1
PCIe 3.0x2
PCIe 3.0x1
PCIe 3.0x1
USB 3.0
USB 3.0
USB 3.0
SATA 3.0
SATA 3.0
SATA 3.0
SATA 3.0
Packet Processor
Parser
Classifier
Buffer &
Descriptor
Manager
Security
Engine
PTP
(IEEE1588)
2.5GbE/1GbE
2.5GbE/1GbE
2.5GbE/1GbE
2.5GbE/1GbE
10GbE
10GbE
12x High Speed SERDES Lanes
Integrated BootROM
Secured Boot with OTP
ARM^® TrustZone^®
Virtualization
Thermal Sensor
Power Management
Low-Dropout Regulator
Real Time Clock
Management Subsystem
MoChi™ Interconnect
Flash I/F:
Device Bus, NAND
2x SDIO 3.0 Host I/F
2x SPI
4x UART, 2x I2C, GPIO
32 TDM/VoIP
Marvell 88F8020 Dual-Core + MoChi Computing Platform