MAXQ3210 Datasheet, PDF (9/28 Pages) Maxim Integrated Products – Microcontroller with Internal Voltage Regulator, Piezoelectric Horn Driver, and Comparator

Microcontroller with Internal Voltage Regulator,
Piezoelectric Horn Driver, and Comparator
and the upper three bits containing the register
subindex within that module. Any time that it is neces-
sary to directly select one of the upper 24 index loca-
tions in a destination module, the prefix register PFX is
needed to supply the extra destination bits. This prefix
register write is inserted automatically by the assembler
and requires only one additional execution cycle.
Memory Organization
The device incorporates several memory areas:
• 2kWords of utility ROM
• 1kWords of EEPROM for program storage
• 128bytes of EEPROM for data storage
• 64bytes of SRAM for storage of temporary variables
• 4-level stack memory for storage of program return
addresses and general-purpose use
The memory is arranged by default in a Harvard archi-
tecture, with separate address spaces for program and
data memory. A special pseudo-Von Neumann memory
mode allows data memory to be mapped into program
space, permitting code execution from data memory.
This places the utility ROM, code, and data memory
into a single contiguous memory map. This is useful for
applications that require dynamic program modification
or unique memory configurations. In addition, another
mode allows program memory to be mapped into data
space, permitting code constants to be accessed as
data memory.
The incorporation of EEPROM for program storage allows
the devices to be reprogrammed, eliminating the expense
of throwing away one-time programmable devices during
development and field upgrades. EEPROM can be pass-
word protected with a 16-word key, denying access to
program memory by unauthorized individuals.
PROGRAM
SPACE
64 x 16
EEPROM
32 x 16
SRAM
A05Fh
A020h
A01Fh
A000h
DATA SPACE
(BYTE MODE)
DATA SPACE
(WORD MODE)
2k x 16
UTILITY ROM
87FFh
8000h
4k x 8
UTILITY ROM
8FFFh
8000h
2k x 16
UTILITY ROM
87FFh
8000h
Figure 1. Memory Map
1k x 16
PROGRAM MEMORY
03FFh
0000h
128 x 8 EEPROM
64 x 8 SRAM
00BFh
0040h
003Fh
0000h
64 x 16 EEPROM
32 x 16 SRAM
005Fh
0020h
001Fh
0000h
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