MAX4534_05 Datasheet, PDF (9/14 Pages) Maxim Integrated Products – Fault-Protected, High-Voltage, Single 4-to-1/Dual 2-to-1 Multiplexers

Fault-Protected, High-Voltage,
Single 4-to-1/Dual 2-to-1 Multiplexers
MAX4534 (Single 4-to-1 Mux)
PIN
1
2
3
4
5
6, 8, 9
7
10
11
12
13
14
NAME
A0
EN
V-
NO1
NO2
N.C.
COM
NO4
NO3
V+
GND
A1
FUNCTION
Address Bit 0
Enable Input
Negative Supply Voltage
Channel Input 1 (fault protected)
Channel Input 2 (fault protected)
No connection
Analog Output
Channel Input 4 (fault protected)
Channel Input 3 (fault protected)
Positive Supply Voltage
Ground
Address Bit 1
Pin Descriptions
MAX4535 (Dual 2-to-1 Mux)
PIN
1
2
3
4
5
6, 9, 14
7
8
10
11
12
13
NAME
A0
EN
V-
NO1A
NO2A
N.C.
COMA
COMB
NO2B
NO1B
V+
GND
FUNCTION
Address Bit 0
Enable Input
Negative Supply Voltage
Channel Input 1A (fault protected)
Channel Input 2A (fault protected)
No connection
Mux Output A
Mux Output B
Channel Input 2B (fault protected)
Channel Input 1B (fault protected)
Positive Supply Voltage
Ground
Truth Tables
MAX4534 (Single 4-to-1 Mux)
A1
A0
EN
ON SWITCH
X
X
0
None
0
0
1
NO1
0
1
1
NO2
1
0
1
NO3
1
1
1
NO4
X = Don’t care; logic 0: V_AL ≤ +0.8; logic 1: V_AH ≥ +2.4V
MAX4535 (Dual 2-to-1 Mux)
A0
EN
COMA
COMB
X
0
None
None
0
1
NO1A
NO1B
1
1
NO2A
NO2B
X = Don’t care; logic 0: V_AL ≤ +0.8; logic 1: V_AH ≥ +2.4V
Detailed Description
The MAX4534/MAX4535 differ considerably from tradi-
tional fault-protected multiplexers, offering several
advantages. First, they are constructed with two paral-
lel FETs, allowing very low resistance when the switch
is on. Second, they allow signals on the NO_ pins that
are within or beyond the supply rails to be passed
through the switch to the COM terminal. This allows rail-
to-rail signal operation. Third, when a signal on VNO_
exceeds the supply rails (i.e., a fault condition), the
voltage on COM_ is limited to the supply rails.
Operation is identical for both fault polarities.
When the NO_ voltage goes beyond supply rails (fault
condition), the NO_ input becomes high impedance
regardless of the switch state or load resistance. When
power is removed, and the fault protection is still in
effect, the NO_ terminals are a virtual open circuit. The
fault can be up to ±40V, with V+ = V- = 0. If the switch
is on, the COM_ output current is furnished from the V+
or V- pin by “booster” FETs connected to each supply
pin. These FETs can source or sink up to 10mA.
The COM_ pins are not fault-protected. If a voltage
source is connected to any COM_ pin, it should be lim-
ited to the supply voltages. Exceeding the supply volt-
age will cause high currents to flow through the ESD
protection diodes, damaging the device (see Absolute
Maximum Ratings).
Figure 1 shows the internal construction, with the ana-
log signal paths shown in bold. A single, normally open
(NO) switch is shown. The analog switch is formed by
the parallel combination of N-channel FET N1 and P-
channel FET P1, which are driven on and off simultane-
ously, according to the input fault condition and the
logic level state.
.
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