MAX31826 Datasheet, PDF (9/22 Pages) Maxim Integrated Products – 1-Wire Digital Temperature Sensor with 1Kb Lockable EEPROM

MAX31826
1-Wire Digital Temperature Sensor
with 1Kb Lockable EEPROM
SCRATCHPAD 1 (POWER-UP STATE
SHOWN IN PARENTHESES)
BYTE 0 TEMPERATURE REGISTER LSB (50h)
BYTE 1 TEMPERATURE REGISTER MSB (05h)
BYTE 2
RESERVED (FFh)
BYTE 3
RESERVED (FFh)
BYTE 4
CONFIGURATION REGISTER*
BYTE 5
RESERVED (FFh)
BYTE 6
RESERVED (FFh)
BYTE 7
RESERVED (FFh)
BYTE 8
CRC
BYTE 0
BYTE 1
...
BYTE 7
SCRATCHPAD 2 (EE SCRATCHPAD)
BYTE 0
BYTE 1
...
BYTE 7
EEPROM
BYTES 00h−07h
BYTES 08h−0Fh
BYTES 10h−17h
...
BYTES 70h−77h
BYTES 78h−7Fh
*THE LOWER 4 BITS (AD[3:0]) OF THE CONFIGURATION REGISTER ARE HARDWIRED THROUGH AD0–AD3.
Figure 4. Memory Map
Memory
The device’s memory is organized as shown in Figure 4. The
memory consists of two SRAM scratchpads (Scratchpad 1
and Scratchpad 2) and 1Kb of EEPROM, which can serve
as general-purpose nonvolatile memory until locked.
All memory commands are described in detail in the
MAX31826 Function Commands section.
Byte 0 and byte 1 of Scratchpad 1 contain the least
significant byte and the most significant byte of the tem-
perature register, respectively. Byte 4 contains the con-
figuration information. Bytes 2, 3, 5, 6, and 7 are reserved
for internal use by the device and cannot be overwritten;
these bytes return all ones when read.
Byte 8 of Scratchpad 1 is read-only and contains the
CRC code for bytes 0–7 of the scratchpad. The device
generates this CRC using the method described in the
CRC Generation section.
Scratchpad 2 (the EE scratchpad) is used for writing to
the EEPROM. Scratchpad 2 consists of 8 bytes; write
data to Scratchpad 2 before copying it to the EEPROM.
Configuration Register
Byte 4 of Scratchpad 1 contains the configuration reg-
ister, which is organized as shown in Configuration
Register Format. The configuration register allows the
user to read the programmed value of the address pins.
The AD[3:0] bits report the pin-programmed location
information. Pins connected to DQ (in parasite power)
or V_DD (when externally powered) are reported with
logic 1, and pins connected to GND are reported as
logic 0. Pins connected to DQ (in parasite power), V_DD
(when externally powered), or GND through a resistor are
valid logic 1s or logic 0s if the resistor is less than 10kI.
Unconnected or high-impedance ( > 10kI) connections
are indeterminate. Bits [7:4] are reserved for internal use
and cannot be overwritten; they return a 1 when read.
Configuration Register Format
BIT 7
—
BIT 6
—
BIT 5
—
BIT 4
—
BIT 3
AD3
BIT 2
AD2
BIT 1
AD1
BIT 0
AD0
Note: Bits [3:0] are programmed through the four location programming address pins, AD3–AD0. Reading the configuration register
provides location information on up to 16 individual devices.
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