MAX14972 Datasheet, PDF(9/12 Page) Maxim Integrated Products – Dual SuperSpeed USB 3.0 Equalizer/Redriver

◁

MAX14972

Dual SuperSpeed USB 3.0 Equalizer/Redriver

Detailed Description

The MAX14972 features two identical drivers to support a

complete single SuperSpeed USB 3.0 link. Programmable

equalization and deemphasis on each channel allows

for optimal board placement of SuperSpeed trans-

ceivers and enables flexibility of front, rear, and side

SuperSpeed ports. The device features advanced power

management with receiver detection and support for

USB 3.0 low-frequency periodic signals (LFPS).

Programmable Input Equalization

Input equalization for channel 1 is controlled by EQ1,

while input equalization for channel 2 is controlled by

EQ2. Each of the two pins, EQ1 and EQ2, has three

equalization settings, which offer flexible compensation

for varied input circuit-board trace, connector, or cable

losses (Table 1). The EQ_ three-state inputs interpret

voltages below VIH and higher than VIL as high imped-

ance. Set EQ_ to 1V, for example, or leave unconnected

if the impedance state is required.

Programmable Output Deemphasis

Channel 1 output transition bit amplitude is controlled

by the OS1 and DE1 pins, and the nontransition bit

amplitude is controlled only by the DE1 pin. Channel 2

output transition bit amplitude is controlled by the OS2

and DE2 pins, and the nontransition bit amplitude is

controlled only by the DE2 pin. There are six possible

output deemphasis states for each of the two channels,

which offer flexibility to compensate for varied losses in

the output circuit-board traces, connectors, or cables

runs (Table 2, Table 3, and Table 4.) The DE_ three-state

input interprets voltages below VIH and higher than VIL

as high impedance. Set DE_ to 1V, for example, or leave

unconnected if a high-impedance state is required.

LFPS Support

The device explicitly supports USB 3.0 LFPS by detect-

ing an idle state at the input and squelching the corre-

sponding output to prevent unwanted noise from being

redriven. When the differential input LFPS signal falls

below the 100mVP-P threshold, the device squelches the

output. When a differential LFPS signal above 300mVP-P

(typ) is present at the input, the device turns on the cor-

responding output and redrives the signal. The device

features an LFPS idle entry time of 4ns (typ) and exit time

of 4ns (typ) in the active state.

Advanced Power Management

Standby State

Drive ENRXD low to place the device into a low-power

standby state. In standby, the inputs are in a common-

mode high-impedance state and the device consumes

less than 1mW (typ) of power. The entry time to standby

is 2Fs (typ), and the exit time is 50Fs (typ).

Table 1. Typical Input Equalization

EQ_

N.C.*

*Not connected.

EQUALIZATION (dB)

Table 2. Typical Output Transition

Bit Amplitude (Refer to the Electrical

Characteristics Table)

OS_

N.C.*, 1

*Not connected.

AMPLITUDE (mVP-P)

1010 to 1270

940 to 1210

Table 3. Typical Output Nontransition Bit

Amplitude

DE_

N.C*

AMPLITUDE (mVP-P)

640

840

940

*Not connected.

Table 4. Typical Output Deemphasis

CONTROL LOGIC

DE_ = 0

DE_ = N.C.

DE_ = 1

OS_ = 0

-2.5dB

-3.3dB

-2.2dB

OS_ = 1, N.C.*

-3.0dB

-3.9dB

-2.7dB

*Not connected.

▷