MAX6414UK31 Datasheet, PDF (8/12 Pages) Maxim Integrated Products – Low-Power, Single/Dual-Voltage muP Reset Circuits

MAX6412–MAX6420
Low-Power, Single/Dual-Voltage µP Reset Circuits
with Capacitor-Adjustable Reset Timeout Delay
3.3V
V_CC
MAX6414
MAX6417
MAX6420
10kΩ
RESET
5.0V
5V SYSTEM
GND
Figure 5. MAX6414/MAX6417/MAX6420 Open-Drain RESET
Output Allows use with Multiple Supplies
Interfacing to Other Voltages for Logic
Compatibility
The open-drain outputs of the MAX6414/MAX6417/
MAX6420 can be used to interface to µPs with other
logic levels. As shown in Figure 5, the open-drain out-
put can be connected to voltages from 0 to 5.5V. This
allows for easy logic compatibility to various micro-
processors.
Negative-Going V_CC Transients
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, these supervisors
are relatively immune to short-duration negative-going
transients (glitches). The Maximum Transient Duration vs.
Reset Threshold Overdrive graph in the Typical
Operating Characteristics shows this relationship.
The area below the curve of the graph is the region in
which these devices typically do not generate a reset
pulse. This graph was generated using a negative-
going pulse applied to V_CC, starting above the actual
reset threshold (V_TH) and ending below it by the magni-
tude indicated (reset-threshold overdrive). As the mag-
nitude of the transient decreases (farther below the
reset threshold), the maximum allowable pulse width
decreases. Typically, a V_CC transient that goes 100mV
below the reset threshold and lasts 50µs or less will not
cause a reset pulse to be issued.
Ensuring a Valid RESET or RESET
Down to V_CC = 0V
When V_CC falls below 1V, RESET/RESET current sink-
ing (sourcing) capabilities decline drastically. In the
case of the MAX6412, MAX6415, and MAX6418, high-
impedance CMOS-logic inputs connected to RESET
can drift to undetermined voltages. This presents no
problems in most applications, since most µPs and
other circuitry do not operate with V_CC below 1V.
In those applications where RESET must be valid down
to 0, adding a pulldown resistor between RESET and
ground sinks any stray leakage currents, holding
RESET low (Figure 6). The value of the pulldown resis-
tor is not critical; 100kΩ is large enough not to load
RESET and small enough to pull RESET to ground. For
applications using the MAX6413, MAX6416, and
MAX6419, a 100kΩ pullup resistor between RESET and
V_CC will hold RESET high when V_CC falls below 1V
(Figure 7). Open-drain RESET versions are not recom-
mended for applications requiring valid logic for V_CC
down to 0V.
V_CC
MAX6412
V_CC
MAX6415
MAX6418
RESET
GND
100kΩ
Figure 6. Ensuring RESET Valid to V_CC = 0V
V_CC
MAX6413 V_CC
MAX6416
MAX6419
100kΩ
RESET
GND
Figure 7. Ensuring RESET Valid to V_CC = 0V
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Maxim Integrated