MAX4291 Datasheet, PDF (8/16 Pages) Maxim Integrated Products – Ultra-Small, +1.8V, μPower, Rail-to-Rail I/O Op Amps

Ultra-Small, +1.8V, µPower,
Rail-to-Rail I/O Op Amps
MAX4291
1
2
3
4
5
–
–
–
–
–
–
PIN
MAX4292
–
4
–
–
8
1, 7
2, 6
3, 5
–
–
–
MAX4294
–
11
–
–
4
1, 7
2, 6
3, 5
8, 14
9, 13
10, 12
NAME
IN+
V_EE
IN-
OUT
V_CC
OUTA, OUTB
INA-, INB-
INA+, INB+
OUTC, OUTD
INC-, IND-
INC+, IND+
Pin Description
FUNCTION
Noninverting Input
Negative Supply. Connect to ground for single-supply operation.
Inverting Input
Amplifier Output
Positive Supply
Outputs for Amplifiers A and B
Inverting Inputs to Amplifiers A and B
Noninverting Inputs to Amplifiers A and B
Outputs for Amplifiers C and D
Inverting Inputs to Amplifiers C and D
Noninverting Inputs to Amplifiers C and D
Detailed Description
Rail-to-Rail Input Stage
The MAX4291/MAX4292/MAX4294 have rail-to-rail
inputs and output stages that are specifically designed
for low-voltage, single-supply operation. The input
stage consists of separate NPN and PNP differential
stages, which operate together to provide a common-
mode range extending to both supply rails. The
crossover region of these two pairs occurs halfway
between V_CC and V_EE. The input offset voltage is typi-
cally ±400µV. Low operating supply voltage, low sup-
ply current, rail-to-rail common-mode input range, and
rail-to-rail outputs make this family of operational ampli-
fiers (op amps) an excellent choice for precision or
general-purpose, low-voltage, battery-powered sys-
tems.
Since the input stage consists of NPN and PNP pairs,
the input bias current changes polarity as the common-
mode voltage passes through the crossover region.
Match the effective impedance seen by each input to
reduce the offset error caused by input bias currents
flowing through external source impedances (Figures
1a and 1b).
The combination of high source impedance plus input
capacitance (amplifier input capacitance plus stray
capacitance) creates a parasitic pole that produces an
underdamped signal response. Reducing input capaci-
tance or placing a small capacitor across the feedback
resistor improves response in this case.
IN
R3
R3 = R1 R2
MAX4291
MAX4292
MAX4294
R1
R2
Figure 1a. Minimizing Offset Error Due to Input Bias Current
(Noninverting)
MAX4291
MAX4292
MAX4294
R3
R3 = R1 R2
IN
R1
R2
Figure 1b. Minimizing Offset Error Due to Input Bias Current
(Inverting)
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