MAX3876 Datasheet, PDF (8/12 Pages) Maxim Integrated Products – 2.5Gbps, Low-Power, +3.3V Clock Recovery and Data Retiming IC

2.5Gbps, Low-Power, +3.3V
Clock Recovery and Data Retiming IC
V_CC
PECL
LEVELS
R_T*
R_T*
0.1µF _25Ω
SDI+
Z_IN = 50Ω
100Ω
0.1µF
25Ω ^{SDI- ZIN = 50Ω}
MAX3876
*SELECT R_T SUCH THAT THE CORRECT PECL COMMON-MODE LEVEL
IS ACHIEVED (TYPICAL PECL OUTPUT CURRENT = 14mA).
Figure 7. PECL-to-CML Interface
V_CC = 3.3V
3.3V
V_CC = 3.3V
226Ω
82Ω
PECL
OUTPUT
243Ω
3.3V
SDI+
Z_IN = 50Ω
226Ω
82Ω
243Ω
SDI-
Z_IN = 50Ω
MAX3876
Figure 8. Direct Coupling of a PECL Output into the MAX3876
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