MAX1605 Datasheet, PDF (8/12 Pages) Maxim Integrated Products – 30V Internal Switch LCD Bias Supply

30V Internal Switch LCD Bias Supply
Design Procedure
Inductor Selection
Smaller inductance values typically offer smaller physi-
cal size for a given series resistance or saturation cur-
rent. Circuits using larger inductance values may start
up at lower input voltages and exhibit less ripple, but
also provide reduced output power. This occurs when
the inductance is sufficiently large to prevent the maxi-
mum current limit from being reached before the maxi-
mum on-time expires. The inductor’s saturation current
rating should be greater than the peak switching cur-
rent. However, it is generally acceptable to bias the
inductor into saturation by as much as 20%, although
this will slightly reduce efficiency.
Picking the Current Limit
The peak LX current limit (I_LX(MAX)) required for the
application may be calculated from the following equa-
tion:
( ) _ILX(MAX)
≥
V_OUT
× I_OUT(MAX)
V_IN(MIN)
+
V_OUT − V_IN(MIN) ×
2×L
t_OFF(MIN)
where t_OFF(MIN) = 0.8µs, and V_IN(MIN) is the minimum
voltage used to supply the inductor. The set current
limit must be greater than this calculated value. Select
the appropriate current limit by connecting LIM to V_CC,
GND, or leaving it unconnected (see the Current Limit
Select Pin (LIM) section and Figure 2).
Diode Selection
The high maximum switching frequency of 500kHz
requires a high-speed rectifier. Schottky diodes, such as
the Motorola MBRS0530 or the Nihon EP05Q03L, are
recommended. To maintain high efficiency, the average
current rating of the Schottky diode should be greater
than the peak switching current. Choose a reverse
breakdown voltage greater than the output voltage.
Output Filter Capacitor
For most applications, use a small ceramic surface-
mount output capacitor, 1µF or greater. For small
ceramic capacitors, the output ripple voltage is domi-
nated by the capacitance value. If tantalum or elec-
trolytic capacitors are used, the higher ESR increases
the output ripple voltage. Decreasing the ESR reduces
the output ripple voltage and the peak-to-peak transient
voltage. Surface-mount capacitors are generally pre-
ferred because they lack the inductance and resis-
tance of their through-hole equivalents.
Input Bypass Capacitor
Two inputs, V_CC and V_IN, require bypass capacitors.
Bypass V_CC with a 0.1µF ceramic capacitor as close to
the IC as possible. The input supplies high currents to
the inductor and requires local bulk bypassing close to
the inductor. A 10µF low-ESR surface-mount capacitor
is sufficient for most applications.
PC Board Layout and Grounding
Careful printed circuit layout is important for minimizing
ground bounce and noise. Keep the MAX1605’s
ground pin and the ground leads of the input and out-
put capacitors less than 0.2in (5mm) apart. In addition,
keep all connections to FB and LX as short as possible.
In particular, when using external feedback resistors,
locate them as close to FB as possible. To minimize
output voltage ripple, and to maximize output power
and efficiency, use a ground plane and solder GND
directly to the ground plane. Refer to the
MAX1605EVKIT evaluation kit for a layout example.
Applications Information
Negative Voltage for LCD Bias
The MAX1605 can also generate a negative output by
adding a diode-capacitor charge-pump circuit (D1, D2,
and C3) to the LX pin as shown in Figure 4. Feedback
is still connected to the positive output, which is not
loaded, allowing a very small capacitor value at C4. For
best stability and lowest ripple, the time constant of the
R1-R2 series combination and C4 should be near or
less than that of C2 and the effective load resistance.
Output load regulation of the negative output is some-
what looser than with the standard positive output cir-
cuit, and may rise at very light loads due to coupling
through the capacitance of D2. If this is objectionable,
reduce the resistance of R1 and R2, while maintaining
their ratio, to effectively preload the output with a few
hundred microamps. This is why the R1-R2 values
shown in Figure 3 are about 10-times lower than typical
values used for a positive-output design. When loaded,
the negative output voltage will be slightly lower (closer
to ground by approximately a diode forward voltage)
than the inverse of the voltage on C4.
Output Disconnected in Shutdown
When the MAX1605 is shut down, the output remains
connected to the input (Figure 3), so the output voltage
falls to approximately V_IN - 0.6V (the input voltage
minus a diode drop). For applications that require out-
put isolation during shutdown, add an external PNP
transistor as shown in Figure 4. When the MAX1605 is
active, the voltage set at the transistor’s emitter
exceeds the input voltage, forcing the transistor into the
8 _______________________________________________________________________________________