MAX1117 Datasheet, PDF (8/14 Pages) Maxim Integrated Products – Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs

Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
V_DD
DOUT
3kΩ
DOUT
3kΩ
GND
a) V_OL TO V_OH
C_LOAD
C_LOAD
GND
b) HIGH-Z to V_OL AND V_OH to V_OL
Figure 1. Load Circuits for Enable Time
DOUT
V_DD
3kΩ
DOUT
3kΩ
GND
C_LOAD
C_LOAD
GND
a) V_OH TO HIGH-Z
b) V_OL TO HIGH-Z
Figure 2. Load Circuits for Disable Time
ANALOG
INPUTS
1µF
CH0
V_DD
0.1µF
CH1
GND
MAX1117
MAX1118
MAX1119
CNVST
REF*
SCLK
DOUT
* MAX1118 ONLY
Figure 3. Typical Operating Circuit
V_DD
V_DD
1µF
CPU
I/O
SCK (SK)
MISO (SI)
GND
GND
CH0
CH1
CAPACITIVE DAC
C_HOLD
16pF
HOLD
R_IN
6.5kΩ
TRACK
Figure 4. Equivalent Input Circuit
COMPARATOR
AUTOZERO
RAIL
Detailed Description
The MAX1117/MAX1118/MAX1119 ADCs use a suc-
cessive-approximation conversion technique and input
T/H circuitry to convert an analog signal to an 8-bit digi-
tal output. The SPI/QSPI/MICROWIRE compatible inter-
face directly connects to microprocessors (µPs) without
additional circuity (Figure 3).
Track/Hold
The input architecture of the ADC is illustrated in Figure
4’s equivalent-input circuit and is composed of the T/H,
the input multiplexer, the input comparator, the
switched capacitor DAC, and the auto-zero rail.
The acquisition interval begins with the falling edge of
CNVST. During the acquisition interval, the analog
inputs (CH0, CH1) are connected to the holding capac-
itor (C_HOLD). Once the acquisition has completed, the
T/H switch opens and C_HOLD is connected to GND,
retaining the charge on C_HOLD as a sample of the sig-
nal at the analog input.
Sufficiently low source impedance is required to ensure
an accurate sample. A source impedance <1.5kΩ is
recommended for accurate sample settling. A 100pF
capacitor at the ADC inputs will also improve the accu-
racy of an input sample.
Conversion Process
The MAX1117/MAX1118/MAX1119 conversion process
is internally timed. The total acquisition and conversion
process takes <7.5µs. Once an input sample has been
acquired, the comparator’s negative input is then con-
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