MAX11129_V4 Datasheet, PDF (8/36 Pages) Maxim Integrated Products – 3Msps, Low-Power, Serial 12-/10-Bit,8-/16-Channel ADCs

MAX11129–MAX11132
3Msps, Low-Power, Serial 12-/10-Bit,
8-/16-Channel ADCs
ELECTRICAL CHARACTERISTICS (MAX11129/MAX11130) (continued)
(V_DD = 2.35V to 3.6V, V_OVDD = 1.5V to 3.6V, f_SAMPLE = 3Msps, f_SCLK = 48MHz, 50% duty cycle, V_REF+ = V_DD, T_A = -40NC to +125NC,
unless otherwise noted. Typical values are at T_A = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
TIMING CHARACTERISTICS (Figure 1) (Note 11)
SCLK Clock Period
t_CP Externally clocked conversion
SCLK Duty Cycle
SCLK Fall to DOUT Transition
16th SCLK Fall to DOUT Disable
t_CH
t_DOT
t_DOD
C_LOAD =
10pF
V_OVDD = 1.5V to 2.35V
V_OVDD = 2.35V to 3.6V
C_LOAD = 10pF, channel ID on
14th SCLK Fall to DOUT Disable
C_LOAD = 10pF, channel ID off
SCLK Fall to DOUT Enable
t_DOE C_LOAD = 10pF
DIN to SCLK Rise Setup
t_DS
SCLK Rise to DIN Hold
t_DH
CS Fall to SCLK Fall Setup
t_CSS
SCLK Fall to CS Fall Hold
t_CSH
CNVST Pulse Width
t_CSW See Figure 6
CS or CNVST Rise to EOC Low
(Note 7)
t_{CNV_INT} See Figure 7, f_SAMPLE = 3Msps
CS Pulse Width
t_CSBW
MIN
20.8
40
4
4
4
1
4
1
5
5
TYP
2.1
MAX
UNITS
ns
60
%
16.5
ns
15
15
ns
16
ns
14
ns
ns
ns
ns
ns
ns
2.4
Fs
ns
Note 2: Limits are 100% production tested at T_A = +25NC. Limits over the operating temperature range are guaranteed by design.
Note 3: Channel ID disabled.
Note 4: Tested in single-ended mode.
Note 5: Offset nulled.
Note 6: Line rejection D(D_OUT) with V_DD = 2.35V to 3.6V and V_REF+ = 2.35V.
Note 7: Tested and guaranteed with fully differential input.
Note 8: Conversion time is defined as the number of clock cycles multiplied by the clock period with a 50% duty cycle.
Maximum conversion time: 1.91Fs + N x 16 x T_{OSC_MAX}
T_{OSC_MAX} = 29.4ns, T_{OSC_TYP} = 25ns.
Note 9: The operational input voltage range for each individual input of a differentially configured pair is from V_DD to GND. The
operational input voltage difference is from -V_REF+/2 to +V_REF+/2 or -V_REF+ to +V_REF+.
Note 10: See Figure 3 (Equivalent Input Circuit).
Note 11: Guaranteed by characterization.
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