ZLF645 Datasheet, PDF (73/201 Pages) Maxim Integrated Products – Flash MCUs with Learning Amplification

ZLF645 Series Flash MCUs
Product Specification
65
ICP Status Register
The ICP Status register (see Table 30) reports status information about the current state of
the ICP and the device.
Table 30. ICP Status Register (ICPSTAT)
Bits
Field
Reset
R/W
7
6
5
4
3
FLASHCTL FLPROT1 FLRWP Reserved FLWAIT
0
0
0
0
0
R
R
R
R
R
2
1
0
Reserved
0
0
0
R
R
R
Bit Position
[7]
[6]
[5]
[4]
[3]
[2:0]
Value
0
1
0
1
0
1
—
0
1
—
Description
FLASHCTL—When read, this bit indicates whether the device is in FLASH
CONTROL mode.
The device is operating in NORMAL mode.
The device is in FLASH CONTROL mode.
FLPROT1—When read, this bit indicates the value of the devices FLPROT1
option bit as read from the User Option Byte 1 Shadow Register (OPT1SR)
on page 175.
FLPROT1 mode is enabled.
FLPROT1 mode is disabled.
FLRWP—When read, this bit indicates the value of the devices FLRWP
option bit as read from the User Option Byte 1 shadow register.
FLRWP mode is enabled.
FLRWP mode is disabled.
Reserved—Must be written to 1.
FLWAIT—When read, this bit indicates whether an ICP initiated Flash
program, page erase, or mass erase operation is completed or not.
An initiated Flash programming, page erase, or mass erase operation is now
complete.
A Flash programming, page erase, or mass erase operation is still in
progress and has not yet completed. No new Flash operations must be
started until this bit reads as a 0.
Reserved—Must be written to 1.
19-4572; Rev 0; 4/09
In-Circuit Programming Control Register Definitions