MAX9121 Datasheet, PDF (7/12 Pages) Maxim Integrated Products – Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout

Quad LVDS Line Receivers with
Integrated Termination and Flow-Through Pinout
V_CC
R_IN2
IN_+
R_IN1
V_CC - 0.3V
R_IN1
IN_-
MAX9121
V_CC
R_IN2
IN_+
R_IN1
OUT_ _RDIFF
R_IN1
IN_-
V_CC - 0.3V
MAX9122
OUT_
Figure 1. Input with Fail-Safe Network
received. Open or undriven terminated input conditions
can occur when a cable is disconnected or cut, or
when the LVDS driver outputs are high impedance. A
short condition can occur because of a cable failure.
The fail-safe input network (Figure 1) samples the input
common-mode voltage and compares it to V_CC - 0.3V
(nominal). When the input is driven to levels specified in
the LVDS standards, the input to the common-mode
voltage is less than V_CC - 0.3V and the fail-safe circuit
is not activated. If the inputs are open or if the inputs
are undriven and shorted or undriven and parallel ter-
minated, there is no input current. In this case, a pullup
resistor in the fail-safe circuit pulls both inputs above
V_CC - 0.3V, activating the fail-safe circuit and forcing
the output high.
Applications Information
Power-Supply Bypassing
Bypass the V_CC pin with high-frequency surface-mount
ceramic 0.1µF and 0.001µF capacitors in parallel as
close to the device as possible, with the smaller valued
capacitor closest to V_CC.
Differential Traces
Input trace characteristics affect the performance of the
MAX9121/MAX9122. Use controlled-impedance PC
board traces to match the cable characteristic imped-
ance. The termination resistor is also matched to this
characteristic impedance.
Eliminate reflections and ensure that noise couples as
common mode by running the differential traces close
together. Reduce skew by matching the electrical
length of the traces. Excessive skew can result in a
degradation of magnetic field cancellation.
Each channel’s differential signals should be routed
close to each other to cancel their external magnetic
field. Maintain a constant distance between the differ-
ential traces to avoid discontinuities in differential
impedance. Avoid 90° turns and minimize the number
of vias to further prevent impedance discontinuities.
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