MAX8973A Datasheet, PDF (7/49 Pages) Maxim Integrated Products – 9A, Three-Phase Step-Down Switching Regulator

MAX8973A
9A, Three-Phase Step-Down
Switching Regulator
Electrical Characteristics (continued)
(V_{IN_} = V_CC = V_EN = 3.6V, V_AGND = V_{PG_} = V_BIASEN = V_DVS = 0V, V_EN = 3.6V, T_A = -40°C to +85°C, unless otherwise noted. Typical
values are at T_A = +25°C.) (Note 2)
PARAMETER
Clock Low Period (t_LOW)
Clock High Period (t_HIGH)
Data Setup Time (t_SU;DAT)
Data Hold Time (t_HD;DAT)
Minimum SCL Rise Time (t_RCL,MIN)
Maximum SCL Rise Time (t_RCL,MAX)
Minimum Rise Time of SCL Signal
After a Repeated START Condition
and After an Acknowledge Bit
(t_RCL1,MIN)
CONDITIONS
MIN
TYP MAX UNITS
160
ns
60
ns
10
ns
0
70
ns
10
ns
40
ns
10
ns
Maximum Rise Time of SCL Signal
After a Repeated START Condition
and After an Acknowledge Bit
(t_RCL1,MAX)
Minimum SCL Fall Time (t_FCL,MIN)
Maximum SCL Fall Time (t_FCL,MAX)
Minimum SDA Rise Time (t_RDA,MIN)
Maximum SDA Rise Time (t_RDA,MAX)
Minimum SDA Fall Time (t_FDA,MIN)
Maximum SDA Fall Time (t_FDA,MAX)
Setup Time for STOP Condition
(t_SU;STO)
Capacitive Load for Each Bus Line
(C_B) (Note 3)
Maximum Pulse Width of Spikes that
Must be Suppressed by the Input
Filter
C_B = 400pF
Clock Frequency (f_SCL)
(Note 3)
Setup Time Repeated START
Condition (t_SU;STA) (Note 3)
Hold Time Repeated START
Condition (t_HD;STA) (Note 3)
Clock Low Period (t_LOW) (Note 3)
80
ns
10
ns
40
ns
10
ns
80
ns
10
ns
80
ns
160
ns
100
pF
10
ns
1.7
MHz
160
ns
160
ns
320
ns
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