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MAX5165 Datasheet, PDF (7/12 Pages) Maxim Integrated Products – 32-Channel Sample/Hold Amplifier with a Single Multiplexed Input
32-Channel Sample/Hold Amplifier
with a Single Multiplexed Input
Table 1. Output Selection
ADDRESS
A2
A1
A0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
0 = Logic Low, 1 = Logic High
MUX0
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
Table 2. Mode Selection
MODE-SELECT
INPUTS (M3–M0)
0
1
ACTION
Sample mode enabled on selected
analog multiplexer and channel
(Table 1).
Hold mode enabled on selected
analog multiplexer and channel
(Table 1).
0 = Logic Low, 1 = Logic High
* Only one M_ input asserted low; all others must be logic high
to meet the timing specification (see Single vs. Simultaneous
Sampling section).
Sample Mode
Driving M3–M0 low (one at a time) selects sample
mode (Tables 1, 2). During sample mode, the selected
multiplexer channel connects to IN, allowing the hold
capacitor to acquire the input signal. To guarantee an
accurate sample, maintain sample mode for at least
4µs. The output of the S/H amplifier tracks the input
after 4µs. Only the addressed channel on the selected
multiplexer samples the input; all other channels remain
in hold mode.
Hold Mode
Driving M3–M0 high selects hold mode. Hold mode dis-
ables the multiplexer and disconnects all eight chan-
nels on the 1-to-8 multiplexer from the input. When a
channel is disconnected, the hold capacitor maintains
the sampled voltage at the output with a 1mV/sec
droop rate (towards VDD).
OUTPUT SELECTED
MUX1
MUX2
OUT8
OUT16
OUT9
OUT17
OUT10
OUT18
OUT11
OUT19
OUT12
OUT20
OUT13
OUT21
OUT14
OUT22
OUT15
OUT23
MUX3
OUT24
OUT25
OUT26
OUT27
OUT28
OUT29
OUT30
OUT31
Hold Step
When switching between sample mode and hold mode,
the voltage of the hold capacitor changes due to
charge injection from stray capacitance. This voltage
change, called hold step, is minimized by limiting the
amount of stray capacitance seen by the hold capaci-
tor. The MAX5165 limits the hold step to 0.25mV (typ).
An output capacitor to ground can be used to filter out
this small hold-step error.
Output
The MAX5165 contains an output buffer for each multi-
plexer channel (32 total), so the hold capacitor sees a
high-impedance input, reducing the droop rate. The
capacitor droops at a 1mV/sec (typ) rate while in hold
mode. The buffer also provides a low output imped-
ance; however, the device contains output resistors in
series with the buffer output (Figure 1) for selected out-
put filtering. To provide greater design flexibility, the
MAX5165 is available with an RO of 50Ω, 500Ω, or 1kΩ.
Note: Output loads increase the analog supply cur-
rent (IDD and ISS). Excessive loading of the output(s)
damages the device by consuming more power than the
device will dissipate (see Absolute Maximum Ratings).
The resistor-divider formed by the output resistor (ROUT)
and load impedance (RL) scales the sampled voltage
(VSAMP). Determine the output voltage (VOUT_) as follows:
Voltage Gain = AV = RL / (RL + ROUT)
VOUT_ = VSAMP · AV
The maximum output voltage range depends on the
analog supply voltages available, and the scaling factor
used:
(VSS + 0.75V) · AV ≤ VOUT_ ≤ (VDD - 2.4V) · AV
when RL = ∞, then AV = 1 and this equation becomes:
(VSS + 0.75V) ≤ VOUT ≤ (VDD - 2.4V)
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