MAX1630 Datasheet, PDF (7/28 Pages) Maxim Integrated Products – Multi-Output, Low-Noise Power-Supply Controllers for Notebook Computers

Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
_________________________________________________Pin Description (continued)
PIN
NAME
FUNCTION
V_DD
(MAX1630/
32/33/35)
Supply Voltage Input for the 12OUT Linear Regulator. Also connects to an internal resistor divider for
secondary winding feedback, and to an 18V overvoltage shunt regulator clamp.
5
SECFB
Secondary Winding Feedback Input. Normally connected to a resistor divider from an auxiliary output.
(MAX1631/ SECFB regulates at V_SECFB = 2.5V (see Secondary Feedback Regulation Loop section). Tie to VL if not
MAX1634) used.
6
SYNC
Oscillator Synchronization and Frequency Select. Tie to VL for 300kHz operation; tie to GND for 200kHz
operation. Can be driven at 240kHz to 350kHz for external synchronization.
7
TIME/ON5
Dual-Purpose Timing Capacitor Pin and ON/OFF Control Input. See Power-Up Sequencing and
ON/OFF Controls section.
8
GND
Low-Noise Analog Ground and Feedback Reference Point
9
REF
2.5V Reference Voltage Output. Bypass to GND with 1µF minimum.
10
SKIP
Logic-Control Input that disables Idle Mode when high. Connect to GND for normal use.
11
RESET
Active-Low Timed Reset Output. RESET swings GND to VL. Goes high after a fixed 32,000 clock-cycle
delay following power-up.
Feedback Input for the 5V SMPS; regulates at FB5 = REF (approx. 2.5V) in adjustable mode. FB5 is a
12
FB5
Dual Mode input that also selects the 5V fixed output voltage setting when tied to GND. Connect FB5 to
a resistor divider for adjustable-output mode.
13
CSL5
Current-Sense Input for the 5V SMPS. Also serves as the feedback input in fixed-output mode, and as
the bootstrap supply input when the voltage on CSL5/VL is > 4.5V.
14
CSH5
Current-Sense Input for the 5V SMPS. Current-limit level is 100mV referred to CSL5.
Pin-Strap Input that selects the SMPS power-up sequence:
15
SEQ
SEQ = GND: 5V before 3.3V, RESET output determined by both outputs
SEQ = REF: Separate ON3/ON5 controls, RESET output determined by 3.3V output
SEQ = VL: 3.3V before 5V, RESET output determined by both outputs
16
DH5
Gate-Drive Output for the 5V, high-side N-channel switch. DH5 is a floating driver output that swings
from LX5 to BST5, riding on the LX5 switching node voltage.
17
LX5
Switching Node (inductor) Connection. Can swing 2V below ground without hazard.
18
BST5
Boost capacitor connection for high-side gate drive (0.1µF)
19
DL5
Gate-Drive Output for the low-side synchronous-rectifier MOSFET. Swings 0V to VL.
20
PGND
Power Ground
5V Internal Linear-Regulator Output. VL is also the supply voltage rail for the chip. After the 5V SMPS
21
VL
output has reached +4.5V (typical), VL automatically switches to the output voltage via CSL5 for boot-
strapping. Bypass to GND with 4.7µF. VL supplies up to 25mA for external loads.
22
V+
Battery Voltage Input, +4.2V to +30V. Bypass V+ to PGND close to the IC with a 0.22µF capacitor.
Connects to a linear regulator that powers VL.
23
SHDN
Shutdown Control Input, active low. Logic threshold is set at approximately 1V. For automatic start-up,
connect SHDN to V+ through a 220kΩ resistor and bypass SHDN to GND with a 0.01µF capacitor.
24
DL3
Gate-Drive Output for the low-side synchronous-rectifier MOSFET. Swings 0V to VL.
25
BST3
Boost Capacitor Connection for high-side gate drive (0.1µF)
26
LX3
Switching Node (inductor) Connection. Can swing 2V below ground without hazard.
27
DH3
Gate-Drive Output for the 3.3V, high-side N-channel switch. DH3 is a floating driver output that swings
from LX3 to BST3, riding on the LX3 switching node voltage.
28
RUN/ON3 ON/OFF Control Input. See Power-Up Sequencing and ON/OFF Controls section.
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