MAX1623 Datasheet, PDF(7/12 Page) Maxim Integrated Products – 3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal Switches

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

MAX1623 Datasheet, PDF (7/12 Pages) Maxim Integrated Products – 3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal Switches

◁

3A, Low-Voltage, Step-Down Regulator with

Synchronous Rectification and Internal Switches

VIN

4.5V TO

5.5V

FBSEL

FEEDBACK

SELECTION

COMP

REF

VIN

VCC

REF

SHDN

REF

MAX1623

REF

GND

CURRENT

SENSE

SKIP

PWM LOGIC

AND

DRIVERS

TIMER

TOFF

CURRENT

SENSE

PGND

NOTE: HEAVY LINES DENOTE HIGH SWITCHING CURRENT PATHS.

Figure 1. Functional Diagram

Idle Mode

At light loads, the device goes into skip mode

(because the load current is below the skip threshold),

and Idle Mode operation (1.25A current limit) begins.

This allows both switches to remain off at the end of the

off-time, skipping cycles to reduce switching losses. At

lighter loads, the inductor current is discontinuous

because the inductor current reaches zero. In Idle

Mode, the operating frequency varies with output load

current. There is no major shift in circuit behavior as the

PWM limit falls below the skip limit. The effective off-

time simply increases, resulting in a seamless transition

between PWM mode and Idle Mode.

PWM Mode

PWM operation occurs whenever the load current is

greater than the skip threshold. In this mode, the PWM

comparator adjusts the current limit to the desired out-

put current, so that the P-channel turns on at the end of

each off-time.

Three signals are resistively summed at the input of the

PWM comparator (Figure 1): an output voltage error

signal relative to the reference voltage, an integrated

output voltage error correction signal, and the sensed

PMOS switch current. The integrated error signal is

provided by a transconductance amplifier with an

external capacitor at the COMP pin. This integrator pro-

vides high DC accuracy without the need for a high-

gain error amplifier. Connecting a capacitor at COMP

modifies the overall loop response (see Integrator

Comparator section).

Setting the Output Voltage

There are two preset output voltages (2.525V and

3.33V), or the output voltage can be adjusted from the

reference voltage (nominally 1.1V) up to 3.8V. For a

preset output voltage (Figure 2), connect FB to the out-

put voltage, and connect FBSEL to VCC (2.525V out-

put) or leave it unconnected (3.33V output). For an

adjustable output, connect FBSEL to GND or REF, and

connect FB to the midpoint of a resistor divider

between the output voltage and ground (Figure 3).

Regulation is maintained when VFB equals VREF. Select

R1 in the 10kâ¦ to 500kâ¦ range. R2 is given by:

R2 = (R1)(VOUT / VREF â 1)

where VREF is typically 1.1V.

_______________________________________________________________________________________ 7

▷