MAX1082_12 Datasheet, PDF (7/23 Pages) Maxim Integrated Products – 300ksps/400ksps, Single-Supply, 4-Channel, Serial 10-Bit ADCs with Internal Reference

MAX1082/MAX1083
300ksps/400ksps, Single-Supply, 4-Channel,
Serial 10-Bit ADCs with Internal Reference
TIMING CHARACTERISTICS—MAX1083
(Figures 1, 2, 5, 6; V_DD1 = V_DD2 = +2.7V to +3.6V; T_A = T_MIN to T_MAX; unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
SCLK Period
SCLK Pulse Width High
SCLK Pulse Width Low
DIN to SCLK Setup
DIN to SCLK Hold
CS Fall to SCLK Rise Setup
SCLK Rise to CS Rise Hold
SCLK Rise to CS Fall ignore
CS Rise to SCLK Rise Ignore
SCLK Rise to DOUT Hold
SCLK Rise to SSTRB Hold
SCLK Rise to DOUT Valid
SCLK Rise to SSTRB Valid
CS Rise to DOUT Disable
CS Rise to SSTRB Disable
CS Fall to DOUT Enable
CS Fall to SSTRB Enable
CS Pulse Width High
t_CP
t_CH
t_CL
t_DS
t_DH
t_CSS
t_CSH
t_CSO
t_CS1
t_DOH
t_STH
t_DOV
t_STV
t_DOD
t_STD
t_DOE
t_STE
t_CSW
C_LOAD = 20pF
C_LOAD = 20pF
C_LOAD = 20pF
C_LOAD = 20pF
C_LOAD = 20pF
C_LOAD = 20pF
C_LOAD = 20pF
C_LOAD = 20pF
208
ns
83
ns
83
ns
45
ns
0
ns
45
ns
0
ns
45
ns
45
ns
13
20
ns
13
20
ns
100
ns
100
ns
13
85
ns
13
85
ns
85
ns
85
ns
100
ns
Note 1: Tested at V_DD1 = V_DD2 = V_DD(MIN); COM = GND, unipolar single-ended input mode.
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
Note 3: Offset nulled.
Note 4: Ground the “on” channel; sine wave is applied to all “off” channels.
Note 5: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 6: The common-mode range for the analog inputs (CH3–CH0 and COM) is from GND to V_DD1.
Note 7: External load should not change during conversion for specified accuracy.
Note 8: ADC performance is limited by the converter’s noise floor, typically 300µVp-p. An external reference below 2.5V
compromises the performance of the ADC.
Note 9: Electrical characteristics are guaranteed from V_DD1(MIN) = V_DD2(MIN) to V_DD1(MAX) = V_DD2(MAX). For operations beyond
this range, see Typical Operating Characteristics. For guaranteed specifications beyond the limits, contact the factory.
Note 10: AIN = midscale.Unipolar Mode. MAX1082 tested with 20pF on DOUT, 20pF on SSTRB, and f_SCLK = 6.4MHz, 0 to 5V.
MAX1083 tested with same loads, f_SCLK = 4.8MHz, 0 to 3V.
Note 11: SCLK = DIN = GND. CS = V_DD1.
Maxim Integrated
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