DS21552 Datasheet, PDF (61/137 Pages) Maxim Integrated Products – T1 Single-Chip Transceivers

DS21352/DS21552
TC1 TO TC24: TRANSMIT CHANNEL REGISTERS (Address=50 to 57 and 40
to 4F Hex)
(for brevity, only channel one is shown; see Table 5-1 for other register address)
(MSB)
(LSB)
C7
C6
C5
C4
C3
C2
C1
C0
TC1 (50)
SYMBOL POSITION NAME AND DESCRIPTION
C7
TC1.7
MSB of the Code (this bit is transmitted first)
C0
TC1.0
LSB of the Code (this bit is transmitted last)
TCC1/TCC2/TCC3: TRANSMIT CHANNEL CONTROL REGISTER (Address=16
to 18 Hex)
(MSB)
CH8
CH16
CH24
CH7
CH15
CH23
CH6
CH14
CH22
CH5
CH13
CH21
CH4
CH12
CH20
CH3
CH11
CH19
CH2
CH10
CH18
(LSB)
CH1
CH9
CH17
TCC1 (16)
TCC2 (17)
TCC3 (18)
SYMBOL POSITION NAME AND DESCRIPTION
CH24
CH1
TCC3.7
TCC1.0
Transmit Channel 24 Code Insertion Control Bit
0=do not insert data from the TC24 register into the transmit data stream
1 = insert data from the TC24 register into the transmit data stream
Transmit Channel 1 Code Insertion Control Bit
0=do not insert data from the TC1 register into the transmit data stream
1 = insert data from the TC1 register into the transmit data stream
11.2 RECEIVE SIDE CODE GENERATION
In the receive direction there are also two methods by which channel data to the backplane can be
overwritten with data generated by the framer. The first method which is covered in Section 11.2.1 was a
feature contained in the original DS2151 while the second method which is covered in Section 11.2.2 is a
new feature of the DS2152/352/552.
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