MAX6953 Datasheet, PDF (6/23 Pages) Maxim Integrated Products – 2-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 x 7 Matrix LED Display Driver

2-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 ✕ 7
Matrix LED Display Driver
ISET
CURRENT
SOURCE
OSC
DIVIDER/
COUNTER
NETWORK
PWM
BRIGHTNESS
CONTROL
ROW
MULTIPLEXER
LED
DRIVERS
O0 TO O23
CHARACTER
GENERATOR
RAM
CHARACTER
GENERATOR
ROM
BLINK
BLINK
SPEED
SELECT
RAM
CONFIGURATION
REGISTERS
SCL
SDA
SERIAL INTERFACE
AD0
AD1
Figure 1. MAX6953 Functional Diagram
Detailed Description
The MAX6953 is a serially interfaced display driver that
can drive four digits of 5 ✕ 7 cathode-row dot-matrix dis-
plays. The MAX6953 can drive either four monocolor
digits (Table 1) or two bicolor digits (Table 2). The
MAX6953 includes a 128-character font map compris-
ing 104 predefined characters and 24 user-definable
characters. The predefined characters follow the Arial
font, with the addition of the following common symbols:
£, <, ¥, °, µ, ±, ↑, and ↓. The 24 user-definable charac-
ters are uploaded by the user into on-chip RAM through
the serial interface and are lost when the device is pow-
ered down. Figure 1 is the MAX6953 functional diagram.
Serial Interface
Serial Addressing
The MAX6953 operates as a slave that sends and
receives data through an I²C-compatible 2-wire inter-
face. The interface uses a serial data line (SDA) and a
serial clock line (SCL) to achieve bidirectional commu-
nication between master(s) and slave(s). A master (typ-
ically a microcontroller) initiates all data transfers to and
from the MAX6953, and generates the SCL clock that
synchronizes the data transfer (Figure 2).
The MAX6953 SDA line operates as both an input and
an open-drain output. A pullup resistor, typically 4.7kΩ,
is required on the SDA. The MAX6953 SCL line oper-
ates only as an input. A pullup resistor, typically 4.7kΩ,
is required on SCL if there are multiple masters on the
2-wire interface, or if the master in a single-master sys-
tem has an open-drain SCL output.
Each transmission consists of a START condition
(Figure 3) sent by a master, followed by the MAX6953
7-bit slave address plus R/W bit (Figure 6), a register
address byte, 1 or more data bytes, and finally a STOP
condition (Figure 3).
Start and Stop Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning the SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 3).
Table 1. Connection Scheme for Four Monocolor Digits
DIGIT
O0–O6
1
Digit 0 rows (cathodes) R1 to R7
Digit 1 rows (cathodes) R1 to R7
2
—
O7–O13
—
Digit 2 rows (cathodes) R1 to R7
Digit 3 rows (cathodes) R1 to R7
O14–O18
Digit 0 columns (anodes)
C1 to C5
Digit 2 columns (anodes)
C1 to C5
O19-–O23
Digit 1 columns
(anodes) C6 to C10
Digit 3 columns
(anodes) C6 to C10
Table 2. Connection Scheme for Two Bicolor Digits
DIGIT
1
2
O0–O6
Digit 0 rows (cathodes)
R1 to R14
—
O7–O13
—
Digit 1 rows (cathodes)
R1 to R14
O14–023
Digit 0 columns (anodes) C1 to C10
- the 5 green anodes -
- the 5 red anodes -
Digit 1 columns (anodes) C1 to C10
- the 5 green columns -
- the 5 red anodes -
6 _______________________________________________________________________________________