MAX1160 Datasheet, PDF (6/8 Pages) Maxim Integrated Products – 10-Bit, 20Msps, TTL-Output ADC

10-Bit, 20Msps, TTL-Output ADC
N
t_pwH
N+1
t_pwL
CLK
t_d
OUTPUT
DATA
N-2
N-1
Figure 1a. Timing Diagram
N+2
DATA VALID
N
DATA VALID
N+1
CLK
OUTPUT
DATA
Figure 1b. Single-Event Clock
t_d
DATA VALID
Table 1. Timing Parameters
PARAMETER
t_d
t_pwH
t_pwL
DESCRIPTION
CLK to Data Valid Propagation Delay
CLK High Pulse Width
CLK Low Pulse Width
MIN
TYP
14
20
20
MAX
18
300
UNITS
ns
ns
ns
The MAX1160 has two grounds: AGND and DGND.
These internal grounds are isolated on the device. Use
ground planes for optimum device performance. Use
DGND for the DV_CC return path (typically 40mA) and
for the return path for all digital output logic interfaces.
Separate AGND and DGND from each other, connect-
ing them together only through a ferrite bead at the
device.
Connect a Schottky or hot carrier diode between AGND
and V_EE. The use of separate power supplies between
V_CC and DV_CC is not recommended due to potential
power-supply-sequencing latchup conditions. For opti-
mum performance, use the recommended circuit
shown in Figure 2.
Voltage Reference
The MAX1160 requires the use of two voltage refer-
ences: VFT and VFB. VFT is the force for the top of the
voltage-reference ladder (typically +2.5V); VFB (typical-
ly -2.5V) is the force for the bottom of the voltage-refer-
ence ladder. Both voltages are applied across an 800Ω
internal reference-ladder resistance. The +2.5V voltage
source for reference VFT must be current limited to
20mA (max) if a different driving circuit is used in place
of the recommended reference circuit shown in Figures
2 and 3. In addition, there are three reference-ladder
taps (VST, VRM, and VSB). VST is the sense for the top
of the reference ladder (+2V), VRM is the midpoint of
the ladder (typically 0V), and VSB is the sense for the
bottom of the reference ladder (-2V). The voltages at
VST and VSB are the device’s true full-scale input volt-
ages when VFT and VFB are driven to the recommend-
ed voltages (typically +2.5V and -2.5V, respectively).
These points should be used to monitor the device’s
actual full-scale input range. When not being used, a
decoupling capacitor of 0.01µF (chip capacitor pre-
ferred) connected to AGND from each tap is recom-
mended to minimize high-frequency noise injection.
Figure 2 shows an example of a recommended refer-
ence-driver circuit. IC1 is a MAX6225, a 2.5V reference
with an accuracy of 0.2%. The 10kΩ potentiometer R1
supports a minimum adjustable range of 0.6%. Use an
OP07 or equivalent device for IC2. R2 and R3 must be
matched to within 0.1% with good TC tracking to main-
tain 0.3LSB matching between VFT and VFB. If 0.1%
matching is not met, then R4 can be used to adjust the
VFB voltage to the desired level. Adjust VFT and VFB
such that VST and VSB are exactly +2V and -2V,
respectively.
The analog input range scales proportionally with respect
to the reference voltage if a different input range is
required. The maximum scaling factor for device opera-
tion is ±20% of the recommended reference voltages of
VFT and VFB. However, because the device is laser
trimmed to optimize performance with ±2.5V references,
its accuracy degrades if operated beyond a ±2% range.
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