MAX11041_10 Datasheet, PDF (6/17 Pages) Maxim Integrated Products – Wired Remote Controller

Wired Remote Controller
PIN
1
2
3, 11
4
5
6
7
8
9
10
12
EP
NAME
GND
SENSE
V_DD
N.C.
A1
A0
SHDN
SCL
SDA
INT
FORCE
EP
Pin Description
FUNCTION
Ground
Voltage Sense Input. Connect SENSE to FORCE through an external lowpass filter composed of R_SENSE
and C_SENSE (see the FORCE and SENSE section). There is a ±15kV IEC 61000-4-2 ESD protection on
SENSE.
Power-Supply Input. Connect both V_DD inputs together and bypass each V_DD with a 0.1µF capacitor to
GND.
No Connection. Leave unconnected or connect to V_DD.
I²C Address Input 1. Logic state represents bit 1 of the I²C slave address.
I²C Address Input 0. Logic state represents bit 0 of the I²C slave address.
Active-Low Shutdown Input. Bring SHDN low to put the MAX11041 in shutdown mode. FORCE is in a
high-impedance state while SHDN is low.
I²C Serial-Interface Clock Input. SCL requires a pullup resistor.
I²C Serial-Interface Data Input/Output. SDA requires a pullup resistor.
Active-Low Interrupt Output. INT goes low when a valid keypress is detected at SENSE.
Force Output. Connect FORCE to the external resistor array. Connect SENSE to FORCE through an
external lowpass filter composed of R_SENSE = 10kΩ and C_SENSE = 10nF. There is a ±15kV IEC 61000-4-2
ESD protection on FORCE.
Exposed Pad. Connect EP to GND.
Detailed Description
The MAX11041 wired remote controller recognizes 30 dif-
ferent keypresses consisting of a resistor/switch array
over a single connector. Designed for wired remote con-
trollers on the headphone or headset cord, the
MAX11041 contains debouncing circuitry and jack inser-
tion/removal detection. During a keypress, the MAX11041
stores the key type and key duration in an 8-word FIFO
and INT (interrupt output) goes low. The results stored in
the FIFO are accessed through the I²C interface.
FORCE and SENSE
During a keypress, a unique external resistor (R_{SW_})
located in the remote controller connects SENSE to
ground (Figure 2). This event changes the impedance
seen by the SENSE line. The MAX11041 decodes this
resistor value to an 8-bit result (see the Required
Resistor Set section). FORCE and SENSE are ±15kV
ESD (IEC 61000-4-2) protected.
Register Description
The MAX11041 contains one 8-bit control register, an
8-word FIFO (each word consists of an 8-bit key value
and an 8-bit duration value), and an 8-bit chip ID.
Chip ID
The chip ID identifies the features and capabilities of the
wired remote controller to the software. For the
MAX11041, the chip ID is 0x00.
Control Register
The MAX11041 contains one control register (see Table
1). Bits C7, C6, and C5 control software shutdown. Set
FORCE high-impedance and indicate if the FIFO is
empty. Write/read to the control register through the I²C-
compatible serial interface (see the Digital Serial
Interface section).
FIFO
The MAX11041 contains an 8-word FIFO that can hold
enough information for four keypresses and releases.
Each keypress and release results in two data words
being stored into the FIFO. Each FIFO word consists of 2
bytes. The 1st byte is the decoded keypress or release
(K7–K0) and the 2nd byte is the keypress or release
duration time. Table 2 shows the format of a keypress
entry into the FIFO. Read the FIFO through the I²C-com-
patible serial interface (see the Digital Serial Interface
section). At power-up, all the FIFO is reset such that
K7–K0 are set to 0xFF hex and 0x0F, and T6–T0 are set
to 0x00. See the Applications Information section for an
example of how data is entered into the FIFO.
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