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MAX64180 Data Sheet
Power Supply Considerations
4
Power Supply Considerations
This section provides detailed information concerning the power supply considerations of the MAX64180
to help ensure first time success in implementing a functional design, which has been optimized for signal
quality.
4.1
Power Supply Sequencing
Figure 4-23 provides the recommended power-up and power-down sequences. In an ideal design, all of
the power supplies become stable at the same time to prevent any direct feed-through current. In real
designs, however, there is typically a time delay before the power supplies stabilize. This section describes
the restrictions on the time differences between the power supplies.
T_LAG1 T_ON
T_OFF T_LAG2
1 .05 V
1.05V Core
Power Supply
0V (Ground Level )
1/8 / 3.3 V
1.8 / 3.3V I/O
Power Supply
0V (Ground Level )
T_RESET
RESETn
Figure 4-23. Power Supply Sequencing
The MAX64180 uses three different power rails: 1.5V for the core, 1.8V for DDR I/Os, and 3.3V for all other
I/Os. When the 1.5V core supply becomes stable, the 1.8V and 3.3V I/O voltages can be brought up at any
time and in any order. During power-down, the I/O voltages must be brought down before the core voltage.
The T_RESET has to be greater than 1 micro second.
The restrictions are listed below:
T_LAG1, T_LAG2 >= 0 ms.
T_ON, T_OFF >= 0 ms.
Revision 1.1
6/4/12
Confidential
Page 59