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MAXQ3180_0912 Datasheet, PDF (55/101 Pages) Maxim Integrated Products – Low-Power, Multifunction, Polyphase AFE
Low-Power, Multifunction, Polyphase AFE
Theory of Operation
Analog Front-End Operation
Whenever the MAXQ3180 is in one of the active operat-
ing modes (Run Mode or LOWPM Mode), the analog
front-end operates continuously, scanning up to eight
scan slots depending on the selected front-end config-
uration. For each analog scan slot that is enabled, one
of the eight differential input pairs is measured.
The SCAN_IX and SCAN_VX (X = A/B/C), SCAN_IN,
and SCAN_TE registers contain the settings for each
slot, which include whether the slot is enabled and the
differential input pair to measure during that scan slot.
The logical mapping of the slots is fixed in following
order:
• Slot 0—Phase A Current (IA)
• Slot 1—Phase A Voltage (VA)
• Slot 2—Phase C Current (IC)
• Slot 3—Phase C Voltage (VC)
• Slot 4—Phase B Current (IB)
• Slot 5—Phase B Voltage (VB)
• Slot 6—Neutral Current (IN)—disabled by default
• Slot 7—Temperature Measurement—disabled by
default
The required time for each analog scan slot measure-
ment (tC) is determined by the MAXQ3180 system
clock frequency and the setting of the R_ADCRATE
hardware register, as shown below:
tC = 1/fCLK x (R_ADCRATE[8:0] + 1)
Using the default register settings (R_ADCRATE = 13Fh
= 319d), the time for each analog slot measurement
(tC) is 40μs when the MAXQ3180 is running at 8MHz.
Since there are eight analog scan slots in the measure-
ment frame, the total time for all measurements (tFR) is
tC x 8. Using the default settings with the MAXQ3180
running at 8MHz, the entire sequence of measurements
takes 320μs to complete, which, in turn, means that
320μs will elapse, for example, between one phase A
current measurement and the next.
Even if some of the analog measurement slots (such as
neutral current or temperature measurement) are
skipped by setting the DADCNV bit in that slot’s regis-
ter to 1, the time period for that slot will remain in the
frame, ensuring that the total frame time is always tC x
8, regardless of which individual slots are enabled or
disabled.
Digital Signal Processing (DSP)
Terminology
Establishing the precise definitions of some of the terms
used in this document will assist in understanding how
the DSP functions.
Sample Period: The amount of time required to mea-
sure a single data element; 40μs, by default.
ADC Frame Period: The amount of time required for
the ADC to sample all analog inputs; always equal to 8
sample periods. The inverse of this value is the frame
rate; by default 3125 samples per second. This is the
rate at which any particular signal is sampled by the
MAXQ3180.
Line Cycle: The period of time from one positive-going
zero crossing on a voltage channel to the next positive-
going zero crossing. At 50Hz, this is nominally 20ms; at
60Hz, this is nominally 16.67ms.
Cycle Count: The number of line cycles contained in a
single DSP cycle. An integer, this is typically set to
some value greater than one to minimize the effect of
load variations that may not occur in every line cycle.
By default, this value is 16.
DSP Cycle: The period of time over which line parame-
ters are calculated. Energy and other parameters are
accumulated once per DSP cycle. One DSP cycle is
the time of a line cycle multiplied by the cycle count.
NS: This value represents the number of ADC frame
periods in a DSP cycle. This is a noninteger calculated
value. For example, if the cycle count is set to unity,
and the line frequency is exactly 50Hz, the NS value
would be 20ms/320μs = 62.5.
Digital Processing
As voltage and current samples are collected, the
MAXQ3180 performs a variety of digital filtering,
accumulation, and processing calculations to arrive at
meter-reading values (such as line frequency, RMS
voltage and current, and active and reactive power)
that can then be read by the master. The MAXQ3180
calculates and detects values and conditions including
the following:
• Zero-crossing detection
• Line frequency and line period calculation
• RMS voltage (phase A, phase B, phase C)
• RMS current (phase A, phase B, phase C, neutral
current)
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