MAX9880A Datasheet, PDF (52/70 Pages) Maxim Integrated Products – Low-Power, High-Performance Dual I2S Stereo Audio Codec

Low-Power, High-Performance
Dual I²S Stereo Audio Codec
GND
MIC HPR HPL
LOUTP
ROUTP
LOUTN
MICBIAS
JACKSNS/AUX
MICLP
Figure 8. Typical Configuration for Headset Detection
Table 22. Debounce Time
JDEB
00
01
10
11
DEBOUNCE (ms)
25
50
100
200
Debounce (JDEB)
Configures the JDET debounce time for changes to
JKSNS[1:0] according to Table 22.
For jack plug insertion/removal, the sequence of events
is as follows:
Jack insertion: No jack is present. The MAX9880A has
a power supply and is in low-power sleep mode
(LOUTP/ROUTP are high impedance). When the
JDETEN I²C bit is set, the JACKSNS pin has weak
pullups to MICVDD. When a jack is subsequently insert-
ed, JACKSNS should change state (indicated by I²C
bits JKSNS[1:0]), and this causes the IRQ pin to be
pulled low, which can trigger a system wakeup.
Jack present: After an interrupt has been sent to the
system controller, the I²C must indicate unambiguously
that a jack is present when the I²C registers are read.
This is done with the JDET I²C bit, which goes high
when there is a change of state of the JKSNS[1:0] bits.
The MAX9880A jack-detect system monitors the
JACKSNS pin and reports the voltage level as high
(> 95% x MICBIAS), mid, or low (< 10% x MICBIAS).
When connected to the microphone pin of the headset
jack, this window comparator allows detection of:
• No headset (high)
• Cellular headset with microphone (high → mid)
• Stereo headset without microphone (high → low)
• Cellular headset button press (mid → low → mid)
• Headset removal (low or mid → high)
Jack removal: A jack is present. All output poles
(headphones/line outs) are assumed driven by a low
impedance amplifier. All input poles (microphones) are
assumed to be biased with a voltage above ground but
below 95% of the MICBIAS voltage. For the MAX9880A
to sense when a jack is removed, the JACKSNS pin
must be connected to the jack in such a way as to
ensure either the JACKSNS pin gets pulled above 95%
of MICBIAS (as would happen if JACKSNS is hooked to
a microphone pole) or it changes state from low to high
or vice versa (as would happen if JACKSNS is hooked
to a ground pole which goes high impedance when the
jack is removed, or is hooked to a regular jack insertion
tab that shorts to ground when the jack is removed).
Subsequently, IRQ is pulled low.
Jack absent: After an interrupt has been sent to the
system controller, the I²C must indicate unambiguously
that a jack is not present when the I²C registers are
read. This is indicated by reading the status of the
JKSNS[1:0] I²C read bits.
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