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MAX1227_11 Datasheet, PDF (5/22 Pages) Maxim Integrated Products – 12-Bit 300ksps ADCs with FIFO, Temp Sensor, Internal Reference
12-Bit 300ksps ADCs with FIFO,
Temp Sensor, Internal Reference
TIMING CHARACTERISTICS (Figure 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
SCLK Clock Period
Externally clocked conversion
208
tCP
Data I/O
100
SCLK Duty Cycle
tCH
40
SCLK Fall to DOUT Transition
CS Rise to DOUT Disable
CS Fall to DOUT Enable
tDOT
tDOD
tDOE
CLOAD = 30pF
CLOAD = 30pF
CLOAD = 30pF
DIN to SCLK Rise Setup
tDS
SCLK Rise to DIN Hold
tDH
0
CS Rise-to-SCLK Rise Setup Time
tCSS1
40
CS Fall-to-SCLK Hold Time
TCSH0
0
CNVST Pulse Width
CKSEL = 00, CKSEL = 01 (temp sense)
40
tCSW
CKSEL = 01 (voltage conversion)
1.4
CS or CNVST Rise to EOC
Low (Note 10)
tTS
Temp sense
Voltage conversion
Reference power-up
ns
60
%
40
ns
40
ns
40
ns
40
ns
ns
ns
ns
ns
µs
55
7
µs
65
Note 10: This time is defined as the number of clock cycles needed for conversion multiplied by the clock period. If the internal ref
erence needs to be powered up, the total time is additive. The internal reference is always used for temperature measure
ments.
Typical Operating Characteristics
(VDD = +3V, VREF = +2.5V, fSCLK = 4.8MHz, CLOAD = 30pF, TA = +25°C, unless otherwise noted.)
1.0
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
0
INTEGRAL NONLINEARITY
vs. OUTPUT CODE
1024
2048
3072
4096
OUTPUT CODE
1.0
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
0
DIFFERENTIAL NONLINEARITY
vs. OUTPUT CODE
1024
2048
3072
4096
OUTPUT CODE
100
90
80
70
60
50
40
30
20
10
0
0.1
SINAD vs. FREQUENCY
1
10
100
1000
FREQUENCY (kHz)
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