DS1091L Datasheet, PDF (5/6 Pages) Maxim Integrated Products – Automotive Temperature Range Spread-Spectrum Econoscillator

Automotive Temperature Range
Spread-Spectrum Econoscillator
Block Diagram
DS1091L
V_CC
V_CC
FACTORY-PROGRAMMED
MASTER OSCILLATOR
f_MOSC
f_MOSC
f_DITHER
GND
DITHER RATE DIVIDER
TRIANGLE WAVE GENERATOR
(DITHER %)
f_OUT
OUT
DR
WHERE f_MOSC IS THE MASTER OSCILLATOR FREQUENCY.
SEL1 SEL0
Detailed Description
The DS1091L is a clock generator that is capable of
output frequencies from 130kHz to 66.6MHz over the
full automotive temperature range (-40°C to +125°C).
The device also is capable of producing a spread-
spectrum (dithered) square-wave output using four pin-
selectable dither percentages. Both center (DS1091LA)
and down (DS1091LB) dithering options are available.
The device also features two selectable dither rates.
The DS1091L is shipped from the factory programmed
to a customer-specified frequency.
Spread Spectrum
The DS1091L has the ability to reduce radiated emis-
sion peaks. The dither percentage is controlled by the
state of the SEL0 and SEL1 pins. The output frequency
can be dithered at 0%, ±1%, ±2%, and ±4%, centered
around the programmed frequency (for the DS1091LB
this can be down dithered by 0%, -2%, -4%, and -8%).
The two select pins SEL0 and SEL1 provide a means of
selecting the dither magnitudes as follows:
A triangle wave generator injects a control signal into
the master oscillator to dither its output. The dither rate
is a function of the output frequency, f_OUT as well as the
setting of the DR pin (see the equation below). Figure 1
shows a plot of the output frequency versus time.
DITHER RATE
=
f_OUT
2ⁿ
where n is defined in Table 2 as a function of output fre-
quency. For example, for an output frequency of
27.0MHz, the dither rate would be 13.2kHz for DR = 0
and 6.6kHz for DR = 1.
Table 1.
SEL1
SEL0
LOGIC LEVEL LOGIC LEVEL
0
0
0
1
1
0
1
1
DITHER MAGNITUDE
DS1091LA DS1091LB
No Dither
No Dither
±1%
-2%
±2%
-4%
±4%
-8%
Table 2.
OUTPUT FREQUENCY f_OUT
(MHz)
f_OUT (min)
0.130
0.261
0.522
1.043
2.084
4.168
8.334
16.668
33.334
f_OUT (max)
0.260
0.521
1.042
2.083
4.167
8.333
16.667
33.333
66.667
n
DR = LOGIC
LEVEL 1
4
5
6
7
8
9
10
11
12
DR = LOGIC
LEVEL 0
5
6
7
8
9
10
11
12
13
_____________________________________________________________________ 5