MAX395 Datasheet, PDF (4/16 Pages) Maxim Integrated Products – Serially Controlled, Low-Voltage, 8-Channel SPST Switch

Serially Controlled, Low-Voltage,
8-Channel SPST Switch
TIMING CHARACTERISTICS—Dual Supplies (Figure 1)
(V+ = +4.5V to +5.5V, V- = -4.5V to -5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
SERIAL DIGITAL INTERFACE
SCLK Frequency
Cycle Time
CS Lead Time
CS Lag Time
SCLK High Time
SCLK Low Time
Data Setup Time
Data Hold Time
DIN Data Valid after Falling SCLK
(Note 4)
Rise Time of DOUT (Note 4)
Allowable Rise Time at DIN, SCLK
(Note 4)
Fall Time of DOUT (Note 4)
Allowable Fall Time at DIN, SCLK
(Note 4)
RESET Minimum Pulse Width
fSCLK
tCH + tCL
tCSS
tCSH2
tCH
tCL
tDS
tDH
tDO
tDR
tSCR
tDF
tSCF
tRW
50% of SCLK to 10% of DOUT,
CL = 10pF
20% of V+ to 70% of V+,
CL = 10pF
20% of V+ to 70% of V+,
CL = 10pF
20% of V+ to 70% of V+,
CL = 10pF
20% of V+ to 70% of V+,
CL = 10pF
MIN
TYP MAX
(Note 1)
UNITS
C, E, M
0
C, E, M
480
C, E, M
240
C, E, M
240
C, E, M
190
C, E, M
190
C, E, M
200 17
C, E, M
0
-17
TA = +25°C
85
C, E, M
C, E, M
C, E, M
C, E, M
C, E, M
TA = +25°C
70
2.1 MHz
ns
ns
ns
ns
ns
ns
ns
ns
400
100 ns
2
µs
100 ns
2
µs
ns
Note 1: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 2: ∆RON = RON(max) - RON(min). On-resistance match between channels and on-resistance flatness are guaranteed only with
specified voltages. Flatness is defined as the difference between the maximum and minimum value of on-resistance as
measured over the specified analog signal range.
Note 3: Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at room temp.
Note 4: Guaranteed by design.
Note 5: Leakage testing at single supply is guaranteed by testing with dual supplies.
Note 6: See Figure 6. Off isolation = 20log10 VCOM/VNO, VCOM = output. NO = input to off switch.
Note 7: Between any two switches. See Figure 3.
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