MAX14800 Datasheet, PDF (4/17 Pages) Maxim Integrated Products – Low-Charge Injection, 16-Channel, High-Voltage Analog Switches

Low-Charge Injection, 16-Channel,
High-Voltage Analog Switches
ELECTRICAL CHARACTERISTICS (continued)
(V_DD = +2.7V to +5.5V, V_PP = +40V to V_NN + 250V, V_NN = -40V to -160V, T_A = T_MIN to T_MAX, unless otherwise noted. Typical values
are at T_A = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
Charge Injection
LOGIC LEVELS
V_PP = +40V, V_NN = -160V, V_{COM_} = 0
Q
V_PP = +100V, V_NN = -100V, V_{COM_} = 0
V_PP = +160V, V_NN = -40V, V_{COM_} = 0
820
600
pC
350
Logic-Input Low Voltage
V_IL
0.75
V
Logic-Input High Voltage
V_IH
V_DD -
V
0.75
Logic-Output Low Voltage
V_OL
I_SINK = 1mA
0.4
V
Logic-Output High Voltage
V_OH
I_SOURCE = 0.75mA
V_DD -
0.5
V
Logic-Input Capacitance
(Note 4)
C_IN
Logic-Input Leakage
I_IN
10
pF
-1
+1
µA
TIMING CHARACTERISTICS
(V_DD = +2.7V to +5.5V, V_PP = +40V to V_NN + 200V, V_NN = -40V to -160V, T_A = T_MIN to T_MAX, unless otherwise noted. Typical values
are at T_A = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
LOGIC TIMING (Figure 1)
CLK Frequency
DIN to CLK Setup Time
DIN to CLK Hold Time
CLK to LE Setup Time
LE Low-Pulse Width
CLR High-Pulse Width
CLK Rise and Fall Times
CLK to DOUT Delay
f_CLK
t_DS
t_DH
t_CS
t_WL
t_WC
t_R, t_F
t_DO
V_DD = +5V ±10%
V_DD = +3V ±10%
V_DD = +5V ±10%
V_DD = +3V ±10%
V_DD = +5V ±10%
V_DD = +3V ±10%
V_DD = +5V ±10%
V_DD = +3V ±10%
V_DD = +5V ±10%
V_DD = +3V ±10%
V_DD = +5V ±10%
V_DD = +3V ±10%
V_DD = +5V ±10%
V_DD = +3V ±10%
V_DD = +5V ±10%
V_DD = +3V ±10%
20
MHz
10
10
ns
16
3
ns
3
36
ns
65
14
ns
22
20
ns
40
50
ns
50
6
42
ns
12
80
Note 2: All devices are 100% tested at T_A = +70°C. Limits over the operating temperature range are guaranteed by design and
characterization.
Note 3: The analog signal input V_{COM_} and V_{NO_} must satisfy V_NN ≤ (V_{COM_}, V_{NO_}) ≤ V_PP, or remain unconnected during power-up
and power-down.
Note 4: Guaranteed by characterization; not production tested.
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