MAX1450 Datasheet, PDF (4/12 Pages) Maxim Integrated Products – Low-Cost, 1%-Accurate Signal Conditioner for Piezoresistive Sensors

Low-Cost, 1%-Accurate Signal Conditioner
for Piezoresistive Sensors
PIN
1
2, 3,
12, 16
4
5
6
7
8
9
10
11
13
14
15
17
18
19
20
NAME
INP
I.C.
SOTC
SOFF
A1
A0
OFFTC
OFFSET
BBUF
FSOTRIM
A2
OUT
V_DD
ISRC
BDRIVE
V_SS
INM
Pin Description
FUNCTION
Positive Sensor Input. Input impedance is typically 1MΩ. Rail-to-rail input range.
Internally connected. Leave unconnected.
Offset TC Sign Bit Input. A logic low inverts V_OFFTC with respect to V_SS. This pin is internally pulled to V_SS
via a 1MΩ (typical) resistor. Connect to V_DD to add V_OFFTC to the PGA output, or leave unconnected (or
connect to V_SS) to subtract V_OFFTC from the PGA output.
Offset Sign Bit Input. A logic low inverts V_OFFSET with respect to V_SS. This pin is internally pulled to V_SS via
a 1MΩ (typical) resistor. Connect to V_DD to add V_OFFSET to the PGA output, or leave unconnected (or con-
nect to V_SS) to subtract V_OFFSET from the PGA output.
PGA Gain-Set Input. Internally pulled to V_SS via a 1MΩ (typical) resistor. Connect to V_DD for a logic high or
V_SS for a logic low.
PGA Gain-Set LSB Input. Internally pulled to V_SS via a 1MΩ (typical) resistor. Connect to V_DD for a logic
high or V_SS for a logic low.
Offset TC Adjust. Analog input summed with PGA output and V_OFFSET. Input impedance is typically 1MΩ.
Rail-to-rail input range.
Offset Adjust Input. Analog input summed with PGA output and V_OFFTC. Input impedance is typically
1MΩ. Rail-to-rail input range.
Buffered Bridge-Voltage Output (the voltage at BDRIVE). Use with correction resistor R_STC to correct for FSO
tempco.
Bridge Drive Current-Set Input. The voltage on this pin sets the nominal I_ISRC. See the Bridge Drive section.
PGA Gain-Set MSB Input. Internally pulled to V_SS via a 11kΩ (typical) resistor. Connect to V_DD for a logic
high or V_SS for a logic low.
PGA Output Voltage. Connect a 0.1µF capacitor from OUT to V_SS.
Positive Supply Voltage Input. Connect a 0.1µF capacitor from V_DD to V_SS.
Current-Source Reference. Connect a 50kΩ (typical) resistor from ISRC to V_SS.
Sensor Excitation Current Output. This pin drives a nominal 0.5mA through the bridge.
Negative Power-Supply Input.
Negative Sensor Input. Input impedance is typically 1MΩ. Rail-to-rail input range.
______________ Detailed Description
Analog Signal Path
The MAX1450’s signal path is fully differential and com-
bines the following three stages: a 3-bit PGA with
selectable gains of 39, 65, 91, 117, 143, 169, 195, and
221; a summing junction; and a differential to single-
ended output buffer (Figure 1).
Programmable-Gain Amplifier
The analog signal is first fed into a programmable-gain
instrumentation amplifier with a CMRR of 90dB and a
common-mode input range from V_SS to V_DD. Pins A0,
A1, and A2 set the PGA gain anywhere from 39V/V to
221V/V (in steps of 26).
A2 A1 A0
INP
PGA
INM
OFFTC SOTC
±
Σ
OUT
A=1
±
OFFSET SOFF
Figure 1. Signal-Path Functional Diagram
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