MAX17080 Datasheet, PDF (39/48 Pages) Maxim Integrated Products – AMD 2-/3-Output Mobile Serial VID Controller

AMD 2-/3-Output Mobile Serial
VID Controller
Core Input Capacitor Selection
The input capacitor must meet the ripple-current
requirement (I_RMS) imposed by the switching currents.
For a dual 180° interleaved controller, the out-of-phase
operation reduces the RMS input ripple current, effec-
tively lowering the input capacitance requirements.
When both outputs operate with a duty cycle less than
50% (V_IN > 2V_OUT), the RMS input ripple current is
defined by the following equation:
( ) ( ) I _RMS =
⎛
⎝⎜
V_OUT1 ⎞
V_IN ⎠⎟
I_OUT1
I_OUT1 − I _IN
+
⎛
⎝⎜
V_OUT2
V_IN
⎞
⎠⎟
I
OUT2
I_OUT2
− I _IN
where I_IN is the average input current:
I _IN
=
⎛
⎝⎜
V_OUT1 ⎞
V_IN ⎠⎟
I_OUT1
+
⎛
⎝⎜
V_OUT2
V_IN
⎞
⎠⎟
I_OUT2
In combined mode (GNDS1 = V_DDIO or GNDS2 =
V_DDIO) with both phases active, the input RMS current
simplifies to:
I_RMS = I_OUT
⎛
⎜
V_OUT
⎞⎛
⎟⎜
1
−
V_OUT
⎞
⎟
⎝ ^V_IN ⎠⎝ ^{2 V}_IN ⎠
For most applications, nontantalum chemistries (ceram-
ic, aluminum, or OS-CON) are preferred due
to their resistance to inrush surge currents typical of
systems with a mechanical switch or connector in
series with the input. If the MAX17080 is operated as
the second stage of a two-stage power-conversion sys-
tem, tantalum input capacitors are acceptable. In either
configuration, choose an input capacitor that exhibits
less than +10°C temperature rise at the RMS input cur-
rent for optimal circuit longevity.
Core Voltage Positioning and Loop Compensation
Voltage positioning dynamically lowers the output volt-
age in response to the load current, reducing the output
capacitance and processor’s power-dissipation require-
ments. The controller uses a transconductance amplifier
to set the transient AC and DC output-voltage droop
(Figure 4). The FBAC and FBDC configuration adjusts
the steady-state regulation voltage as a function of the
load. This adjustability allows flexibility in the selected
current-sense resistor value or inductor DCR, and allows
smaller current-sense resistance to be used, reducing
the overall power dissipated.
Core Transient Droop and Stability
The inductor current ripple sensed across the current-
sense inputs (CSP_ - CSN_) generates a proportionate
current out of the FBAC pin. This AC current flowing
across the effective impedance at FBAC generates an
AC ripple voltage. Actual stability, however, depends
on the AC voltage at the FBDC pin, and not on the
FBAC pin. Based on the configuration shown in Figure
4, the ripple voltage at the FBDC pin can only be less
than, or equal to, the ripple at the FBAC pin.
With the requirement that R_FBDC = R_FBAC, and
(Z_CFB//R_FB) < 10% of R_FBAC, then:
R_FBAC
=
R_FBDC
≥
1
C_OUTf_SWR_SENSEGm_(FBAC)
where Gm_{(FBAC_)} is typically 2mS as defined in the
Electrical Characteristics table, R_{SENSE_} is the effective
value of the current-sense element that is used to pro-
vide the (CSP_, CSN_) current-sense voltage, and f_SW
is the selected switching frequency.
Based on the above requirement for R_FBAC and R_FBDC,
and with the other requirement for R_FBDC defined in the
Core Steady-State Voltage Positioning (DC Droop) sec-
tion, R_FBAC and R_FBDC can be chosen. The resultant
AC droop is:
R_{DROOP _ AC}
≈
R_FBDCR_FBACR_SENSE
R_FBAC + R_FBDC
Gm_(FBAC)
Capacitor C_FB is required when the R_{DROOP_DC} is less
than R_{DROOP_AC}. Choose C_FB according to the following
equation:
C_FB × ⎡⎣R_FB / /(R_FBAC + R_FBDC) ⎤⎦ = 3 × t_SW
Core Steady-State Voltage Positioning
With R_{DROOP_AC} defined, the steady-state voltage-
positioning slope, R_{DROOP_DC}, can only be less than,
or at most equal to, R_{DROOP_AC}:
R_DROOP
_ DC
=
R_FBDCR_FBACR_SENSE
R_FBAC + R_FBDC + R_FB
Gm_(FBAC)
Choose the R_FBDC and R_FBAC already previously cho-
sen, then select R_FB to give the desired droop.
DC droop is typically used together with the +12.5mV
offset feature to keep within the DC tolerance window of
the application. See the Offset and Address Change for
Core SMPSs (OPTION) section.
Core Power-MOSFET Selection
Most of the following MOSFET guidelines focus on the
challenge of obtaining high-load-current capability
when using high-voltage (> 20V) AC adapters. Low-
current applications usually require less attention.
The high-side MOSFET (N_H) must be able to dissipate
the resistive losses plus the switching losses at both
V_IN(MIN) and V_IN(MAX). Calculate both of these sums.
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