MAX14827A Datasheet, PDF (37/42 Pages) Maxim Integrated Products – High Configurability and Integration Reduce SKUs

MAX14827A
Low-Power, Ultra-Small, Dual Driver,
IO-Link Device Transceiver
SPI Interface
The device communicates through an SPI-compatible
4-wire serial interface. The MAX14827A supports burst
read/write access. The maximum SPI clock rate for the
device is 12MHz. The SPI interface complies with clock
polarity CPOL = 0 and clock phase CPHA = 0 (see Figure 7
and Figure 8).
The SPI interface is not available when V₅ or V_L are not
present.
CS/PP
CLK/
TXEN/
200MA
SDI/TX/
NPN
W
0
0
0
0 A2 A1 A0 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
A_ = REGISTER ADDRESS
BIT_ = DATA BIT
= CLOCK EDGE THAT INTIATES LATCHING OF SDI DATA
Figure 7. SPI Write Cycle
CS/PP
CLK/
TXEN/
200MA
SDI/TX/
NPN
X
R
0
0
0
0 A2 A1 A0
X
SDO/RX/
THSH
A_ = REGISTER ADDRESS
BIT_ = DATA BIT
= CLOCK EDGE THAT INTIATES LATCHING OF SDI DATA
= CLOCK EDGE THAT INTIATES WRITING OF SDO DATA
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
Figure 8. SPI Read Cycle
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