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MAX6889 Datasheet, PDF (34/40 Pages) Maxim Integrated Products – EEPROM-Programmable, Octal/Hex/Quad, Power-Supply Sequencers/Supervisors
EEPROM-Programmable, Octal/Hex/Quad,
Power-Supply Sequencers/Supervisors
Read Byte
The read byte protocol allows the master device to
read the register or an EEPROM location (user or con-
figuration) content of the MAX6889/MAX6890/MAX6891
(see Figure 8). The read byte procedure follows:
1) The master sends a Start condition.
2) The master sends the 7-bit slave address and a
write bit (low).
3) The addressed slave asserts an ACK on the data
line.
4) The master sends 8 data bits.
5) The active slave asserts an ACK on the data line.
6) The master sends a repeated Start condition.
7) The master sends the 7-bit slave ID plus a read bit
(high).
8) The addressed slave asserts an ACK on the data
line.
9) The slave sends 8 data bits.
10) The master asserts a NACK on the data line
11) The master generates a Stop condition.
Note that once the read has been done, the internal
pointer is increased by one, unless a memory boundary
is hit.
If the device is busy or if the address is not an allowed
one, the command code is NACKed and the internal
address pointer is not altered. The master must then
interrupt the communication issuing a STOP condition.
Block Read
The block read protocol allows the master device to read
a block of 16 bytes from the EEPROM or register bank
(see Figure 8). Read fewer than 16 bytes of data by issu-
ing an early STOP condition from the master, or by gen-
erating a NACK with the master. Previous actions through
the serial interface predetermines the first source
address. It is suggested to use a send byte protocol,
before the block read, to set the initial read address. The
block read protocol is initiated with a command code of
C1h. The block read procedure follows:
1) The master sends a Start condition.
2) The master sends the 7-bit slave address and a
write bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends 8 bits of the block read com-
mand (C1h).
5) The slave asserts an ACK on SDA, unless busy.
6) The master generates a repeated Start condition.
7) The master sends the 7-bit slave address and a
read bit (high).
8) The slave asserts an ACK on SDA.
9) The slave sends the 8-bit byte count (16).
10) The master asserts an ACK on SDA.
11) The slave sends 8 bits of data.
12) The master asserts an ACK on SDA.
13) Repeat steps 8 and 9 15 times.
14) The master generates a Stop condition.
Address Pointers
Use the send byte protocol to set the register address
pointers before read and write operations. For the con-
figuration registers, valid address pointers range from
00h to 2Fh. Register addresses outside of this range
result in a NACK being issued from the MAX6889/
MAX6890/MAX6891. When using the block write proto-
col, the address pointer automatically increments after
each data byte, except when the address pointer is
already at 2Fh. If the address pointer is already 2Fh,
and more data bytes are being sent, these subsequent
bytes overwrite address 2Fh repeatedly. No data will
be left in 2Fh as this is a read-only address.
For the configuration EEPROM, valid address pointers
range from 80h to B7h (even if they are only meaningful
up to AEh). When using the block write protocol, the
address pointer automatically increments after each
data byte, except when the address pointer is already
at B7h. If the address pointer is already B7h, and more
data bytes are being sent, these subsequent bytes
overwrite address B7h repeatedly, leaving only the last
sent data byte stored at this register address.
For the user EEPROM, valid address pointers range
from 40h to 7Fh. As for the configuration EEPROM,
block write and block read protocols can also be used.
The internal address pointer will auto-increment up to
the user-EEPROM boundary 7Fh where the pointer will
stop incrementing. When writing, only the last data writ-
ten will be stored in 7Fh.
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