MAX1304 Datasheet, PDF (34/36 Pages) Maxim Integrated Products – 8-/4-/2-Channel, 12-Bit, Simultaneous-Sampling ADCs with ±10V, ±5V, and 0 to +5V Analog Input Ranges

8-/4-/2-Channel, 12-Bit, Simultaneous-Sampling ADCs
with ±10V, ±5V, and 0 to +5V Analog Input Ranges
Aperture Jitter
Aperture Jitter (t_AJ) is the sample-to-sample variation in
aperture delay.
Jitter is a concern when considering an ADC’s dynamic
performance, e.g., SNR. To reconstruct an analog input
from the ADC digital outputs, it is critical to know the
time at which each sample was taken. Typical applica-
tions use an accurate sampling clock signal that has
low jitter from sampling edge to sampling edge. For a
system with a perfect sampling clock signal, with no
clock jitter, the SNR performance of an ADC is limited
by the ADC’s internal aperture jitter as follows:
SNR
= ₂₀
x
log

 ²
x
π
1
x f_IN
x

t_{AJ }
where f_IN represents the analog input frequency and
t_AJ is the time of the aperture jitter.
Small-Signal Bandwidth
A small -20dBFS analog input signal is applied to an
ADC so that the signal’s slew rate does not limit the
ADC’s performance. The input frequency is then swept
up to the point where the amplitude of the digitized
conversion result has decreased by -3dB.
Full-Power Bandwidth
A large, -0.5dBFS analog input signal is applied to an
ADC, and the input frequency is swept up to the point
where the amplitude of the digitized conversion result
has decreased by -3dB. This point is defined as full-
power input bandwidth frequency.
DC Power-Supply Rejection (PSRR)
DC PSRR is defined as the change in the positive full-
scale transfer function point caused by a ±5% variation
in the analog power-supply voltage (AV_DD).
Chip Information
TRANSISTOR COUNT: 50,000
PROCESS: 0.6µm BiCMOS
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