MAX77342 Datasheet, PDF (33/50 Pages) Maxim Integrated Products – DC-DC Step-Up Converter

MAX77342
1.6A Adaptive DC-DC Step-Up Converter
with High-Side Flash Driver
START and STOP Conditions
Both SCL and SDA remain high when the bus is not busy.
The master signals the beginning of a transmission with
a START (S) condition by transitioning SDA from high
to low while SCL is high. When the master has finished
communicating with the IC, it issues a STOP (P) condition
by transitioning SDA from low to high while SCL is high.
The bus is then free for another transmission, Figure 16.
Both START and STOP conditions are generated by the
bus master.
Acknowledge
The acknowledge bit is used by the recipient to hand-
shake the receipt of each byte of data (Figure 17). After
data transfer, the master generates the acknowledge
clock pulse and the recipient pulls down the SDA line dur-
ing this acknowledge clock pulse so the SDA line stays
low during the high duration of the clock pulse. When the
master transmits the data to the IC, it releases the SDA
line and the IC takes control of the SDA line and gener-
ates the acknowledge bit. When SDA remains high during
this 9th clock pulse, this is defined as the not acknowl-
edge signal. The master can then generate either a STOP
condition to abort the transfer, or a repeated START con-
dition to start a new transfer.
SDA
SCL
START
CONDITION
Figure 16. Start and Stop Conditions
STOP
CONDITION
SDA BY MASTER
SDA BY SLAVE
D7 D6
D0
NOT ACKNOWLEDGE
SCL
ACKNOWLEDGE
1
2
8
9
START CONDITION
CLOCK PULSE FOR
ACKNOWLEDGEMENT
Figure 17. Acknowledge
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