MAX16046 Datasheet, PDF (33/68 Pages) Maxim Integrated Products – 12-Channel/8-Channel EEPROM-Programmable System Managers with Nonvolatile Fault Registers

12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Table 15. Power-Good (PG) Thresholds
REGISTER/
EEPROM
ADDRESS
64h
BIT RANGE
DESCRIPTION
[1:0]
[3:2]
[5:4]
[7:6]
00 = PG is asserted when monitored V_MON1 is 95% of V_INS1
01 = PG is asserted when monitored V_MON1 is 92.5% of V_INS1
10 = PG is asserted when monitored V_MON1 is 90% of V_INS1
11 = PG is asserted when monitored V_MON1 is 87.5% of V_INS1
00 = PG is asserted when monitored V_MON2 is 95% of V_INS2
01 = PG is asserted when monitored V_MON2 is 92.5% of V_INS2
10 = PG is asserted when monitored V_MON2 is 90% of V_INS2
11 = PG is asserted when monitored V_MON2 is 87.5% of V_INS2
00 = PG is asserted when monitored V_MON3 is 95% of V_INS3
01 = PG is asserted when monitored V_MON3 is 92.5% of V_INS3
10 = PG is asserted when monitored V_MON3 is 90% of V_INS3
11 = PG is asserted when monitored V_MON3 is 87.5% of V_INS3
00 = PG is asserted when monitored V_MON4 is 95% of V_INS4
01 = PG is asserted when monitored V_MON4 is 92.5% of V_INS4
10 = PG is asserted when monitored V_MON4 is 90% of V_INS4
11 = PG is asserted when monitored V_MON4 is 87.5% of V_INS4
DAC Outputs
The MAX16046/MAX16048 feature an 8-bit DAC with 12
outputs (MAX16046) or 8 outputs (MAX16048) for volt-
age margining. Program the voltage on the DAC out-
puts (DACOUT1–DACOUT12) to trim external
power-supply voltages, either by connecting through a
series resistor to the feedback node or to the trim input.
DAC outputs are high impedance during power-up to
prevent improper operation of the external power sup-
plies, and must be explicitly enabled by setting the
appropriate DACOUT_ enable bits.
Each DACOUT output has three voltage ranges: 0.4V to
0.8V, 0.6V to 1.2V, and 0.8V to 1.6V. Configure DAC
outputs using registers r12h to r14h (see Table 16).
Calculate DACOUT_ voltages, V_{DACOUT_}, using the fol-
lowing equation:
V_{DACOUT_} = DAC_ACC (V) + ((DAC_n - 80h) x
(DAC_RNG)/255) (V)
where DAC_ACC is the DAC center code absolute accu-
racy and DAC_RNG is the DAC output voltage range as
listed in the Electrical Characteristics table and 07h <
DAC_n < F8h.
Set any DACOUT_ range configuration register to 00h
to switch off the DACOUT buffer. Set the DACOUT_
enable bit to ‘0’ to leave the DAC output as high imped-
ance. See Table 16 for the registers associated with the
DAC output ranges.
The DAC enable bits are not copied from EEPROM dur-
ing the boot phase; therefore each DACOUT_ output
must be enabled in the r1Ch and r1Dh registers, locat-
ed in the extended page, following power-up. See
Table 17 for the DAC enable bits.
To control the voltage on a particular DAC output, write
the 8-bit binary value to the appropriate output regis-
ter; see Table 18 for the register locations. Although
these registers are located in the default page, they
are not stored in nonvolatile EEPROM and are set to ‘0’
after a POR.
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