DS7505 Datasheet, PDF (3/14 Pages) Maxim Integrated Products – Digital Thermometer and Thermostat

Digital Thermometer and Thermostat
AC ELECTRICAL CHARACTERISTICS (continued)
(1.7V ≤ V_DD ≤ 3.7V, T_A = -55°C to +125°C, unless otherwise noted.)
PARAMETER
EEPROM Data Retention
Bus Free Time Between a STOP
and START Condition
SYMBOL
CONDITIONS
tEEDR -40°C to +125°C (Note 8)
tBUF (Note 9)
MIN TYP MAX UNITS
10
Years
1.3
µs
START and Repeated START
Hold Time from Falling SCL
Low Period of SCL
High Period of SCL
Repeated START Condition
Setup Time to Rising SCL
tHD:STA (Notes 9, 10)
tLOW
tHIGH
(Note 9)
(Note 9)
tSU:STA (Note 9)
600
ns
1.3
µs
0.6
µs
600
ns
Data-Out Hold Time from Falling
SCL
tHD:DAT (Notes 9, 11)
0
0.9
µs
Data-In Setup Time to Rising
tSU:DAT (Note 9)
100
ns
Rise Time of SDA and SCL
(Receive)
tR
(Notes 9, 12)
20 +
0.1CB
ns
300
Fall Time of SDA and SCL
(Receive)
tF
(Notes 9, 12)
20 +
0.1CB
300
ns
Spike Suppression Filter Time
tSS
(Deglitch Filter)
0
50
ns
STOP Setup Time to Rising SCL tSU:STO (Note 9)
600
ns
Capacitive Load for Each Bus
Line
CB
400
pF
Input Capacitance
CI
5
pF
Serial Interface Reset Time
tTIMEOUT SDA time low (Note 13)
75
325
ms
Note 1: All voltages are referenced to ground.
Note 2: Internal heating caused by O.S. loading causes the DS7505 to read approximately 0.5°C higher if O.S. is sinking the
max-rated current.
Note 3: Specified in 12-bit conversion mode. Quantization error must be considered when converting in lower resolutions.
Note 4: IDD specified with O.S. pin open.
Note 5: IDD specified with VDD at 3.0V and SDA, SCL = 3.0V, TA = -55°C to +85°C.
Note 6: I_DD specified with A0, A1, A2 = 0V or V_DD.
Note 7: VDD must be > 2.0V.
Note 8: E² Copy occurs at +25°C.
Note 9: See the timing diagram (Figure 1). All timing is referenced to 0.9 x VDD and 0.1 x VDD.
Note 10: After this period, the first clock pulse is generated.
Note 11: The DS7505 provides an internal hold time of at least 75ns on the SDA signal to bridge the undefined region of SCL’s
falling edge.
Note 12: For example, if CB = 300pF, then tR(MIN) = tF(MIN) = 50ns.
Note 13: This timeout applies only when the DS7505 is holding SDA low. Other devices can hold SDA low indefinitely and the
DS7505 does not reset.
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