DS4432 Datasheet, PDF (3/9 Pages) Maxim Integrated Products – Dual-Channel, I2C, 7-Bit Sink/Source Current DAC

Dual-Channel, I²C, 7-Bit Sink/Source
Current DAC
OUTPUT CURRENT SOURCE CHARACTERISTICS (continued)
(V_CC = +2.7V to +5.5V, TA = -40°C to +85°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
Output Current Variation Due to
Power-Supply Change
Output Current Variation Due to
Output-Voltage Change
DC source, V_OUT measured at 1.2V
DC sink, V_OUT measured at 1.2V
DC source, V_CC = 3.3V
DC sink, V_CC = 3.3V
Output Leakage Current at Zero
Current Setting
I_ZERO
-1
Output Current Differential
Linearity
DNL (Notes 6, 7)
-0.5
Output Current Integral Linearity
INL
(Notes 7, 8)
-1
TYP
0.41
0.41
0.08
0.14
MAX
+1
UNITS
%/V
%/V
μA
+0.5 LSB
+1
LSB
AC ELECTRICAL CHARACTERISTICS
(V_CC = +2.7V to +5.5V, T_A = -40°C to +85°C.)
PARAMETER
SCL Clock Frequency
Bus Free Time Between STOP
and START Conditions
SYMBOL
f_SCL
(Note 9)
t_BUF
CONDITIONS
MIN TYP MAX UNITS
0
400
kHz
1.3
μs
Hold Time (Repeated) START
Condition
t_HD:STA
0.6
μs
Low Period of SCL
High Period of SCL
Data Hold Time
Data Setup Time
START Setup Time
SDA and SCL Rise Time
SDA and SCL Fall Time
STOP Setup Time
SDA and SCL Capacitive
Loading
t_LOW
t_HIGH
t_HD:DAT
t_SU:DAT
t_SU:STA
t_R
t_F
t_SU:STO
(Note 10)
(Note 10)
C_B
(Note 10)
1.3
0.6
0
100
0.6
20 + 0.1C_B
20 + 0.1C_B
0.6
μs
μs
0.9
μs
ns
μs
300
ns
300
ns
μs
400
pF
Note 1: All voltages with respect to ground. Currents entering the IC are specified positive, and currents exiting the IC are negative.
Note 2: Input resistors (R_FS) must be between the specified values to ensure the device meets its accuracy and linearity specifications.
Note 3: Supply current specified with all outputs set to zero current setting. SDA and SCL are connected to V_CC. Excludes current
through R_FS resistors (I_RFS). Total current including I_RFS is I_CC + (2 x I_RFS).
Note 4: The output voltage range must be satisfied to ensure the device meets its accuracy and linearity specifications.
Note 5: Temperature drift excludes drift caused by external resistor.
Note 6: Differential linearity is defined as the difference between the expected incremental current increase with respect to position
and the actual increase. The expected incremental increase is the full-scale range divided by 127.
Note 7: Guaranteed by design.
Note 8: Integral linearity is defined as the difference between the expected value as a function of the setting and the actual value.
The expected value is a straight line between the zero and the full-scale values proportional to the setting.
Note 9: Timing shown is for fast-mode (400kHz) operation. This device is also backward compatible with I²C standard-mode timing.
Note 10: C_B—total capacitance of one bus line in pF.
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