ZLR32300 Datasheet, PDF (29/103 Pages) Zilog, Inc. – Z8 Low-Voltage ROM MCU with Infrared Timers

Crimzon^® ZLR32300
Product Specification
24
The upper nibble of the register pointer (see Figure 13) selects which working
register group of 16 bytes in the register file, is accessed out of the possible 256.
The lower nibble selects the expanded register file bank and, in the case of the
Crimzon ZLR32300 family, banks 0, F, and D are implemented. A 0h in the lower
nibble allows the normal register file (bank 0) to be addressed. Any other value
from 1h to Fh exchanges the lower 16 registers to an expanded register bank.
R253 RP
D7 D6 D5 D4 D3 D2 D1 D0
Default Setting After Reset = 0000 0000
Expanded Register
File Pointer
Working Register
Pointer
Figure 13. Register Pointer
Example: Crimzon ZLR32300 (see Figure 12 on page 23).
R253 RP = 00h
R0 = Port 0
R1 = Port 1
R2 = Port 2
R3 = Port 3
But if:
R253 RP = 0Dh
R0 = CTR0
R1 = CTR1
R2 = CTR2
R3 = CTR3
The counter/timers are mapped into ERF group D. Access is easily performed
using the following:
LD
for access to bank D
register group 0)
LD
LD
RP, #0Dh
R0,#xx
1, #xx
; Select ERF D
; (working
; load CTR0
; load CTR1
19-4623; Rev 0; 5/09
Functional Description