MAX5965A_10 Datasheet, PDF (29/53 Pages) Maxim Integrated Products – High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet

High-Power, Quad, Monolithic, PSE Controllers
for Power over Ethernet
LD_DISC_ is set high whenever the corresponding port
shuts down due to detection of load removal.
IMAX_FLT_ is set high when the port shuts down due to
an extended overcurrent event after a successful start-
up. A 1 in any of the LD_DISC_ bits forces R00h[2] to 1.
A 1 in any of the IMAX_FLT_ bits forces R00h[5] to 1.
As with any of the other events register, the fault event
register has two addresses. When read through the
R06h address, the content of the register is left
unchanged. When read through the CoR R07h
address, the register content is cleared. A reset sets
R06h/R07h = 00h.
Table 10. Fault Event Register
SYMBOL
LD_DISC4
LD_DISC3
LD_DISC2
LD_DISC1
IMAX_FLT4
IMAX_FLT3
IMAX_FLT2
IMAX_FLT1
ADDRESS
BIT
06h
07h
R/W R/W
7
R
CoR
6
R
CoR
5
R
CoR
4
R
CoR
3
R
CoR
2
R
CoR
1
R
CoR
0
R
CoR
Disconnect on port 4
Disconnect on port 3
Disconnect on port 2
Disconnect on port 1
Overcurrent on port 4
Overcurrent on port 3
Overcurrent on port 2
Overcurrent on port 1
DESCRIPTION
If the port remains in current limit or the PGOOD condi-
tion is not met at the end of the startup period, the port
shuts down and the corresponding STRT_FLT_ is set to
1. A 1 in any of the STRT_FLT_ bits forces R00h[6] to 1.
IVC_ is set to 1 whenever the port current exceeds the
maximum allowed limit for the class (determined during
the classification process). A 1 in any of IVC_ forces
R00h[6] to 1. When the CL_DISC (R17h[2]) is set to 1,
the port also limits the load current according to its
class as specified in the Electrical Characteristics table.
As with any of the other events register, the startup
event register has two addresses. When read through
the R08h address, the content of the register is left
unchanged. When read through the CoR R09h
address, the register content is cleared. A reset sets
R08h/R09h = 00h.
Table 11. Startup Event Register
SYMBOL
IVC4
IVC3
IVC2
IVC1
STRT_FLT4
STRT_FLT3
STRT_FLT2
STRT_FLT1
ADDRESS
BIT
08h
09h
R/W R/W
7
R
CoR
6
R
CoR
5
R
CoR
4
R
CoR
3
R
CoR
2
R
CoR
1
R
CoR
0
R
CoR
DESCRIPTION
Class overcurrent flag for port 4
Class overcurrent flag for port 3
Class overcurrent flag for port 2
Class overcurrent flag for port 1
Startup failed on port 4
Startup failed on port 3
Startup failed on port 2
Startup failed on port 1
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