MAX1540 Datasheet, PDF (26/49 Pages) Maxim Integrated Products – Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator

Dual Step-Down Controllers with Saturation
Protection, Dynamic Output, and Linear Regulator
INT FB_
INT REF_
CCC1 C1
*MAIN MAX1541
CONTROLLER (OUT1) ONLY
R
G_m
=
80
A
V
7R
VALLEY CURRENT
LIMIT
ERROR
AMP
SLOPE COMP
t_OFF(MIN)
Q
TRIG
1-SHOT
S
Q
R
DH DRIVER
SATURATION
LIMIT
V+
TON
OUT_
t_ON
Q
TRIG
1-SHOT
ON-TIME
COMPUTE
S
Q
R
DL DRIVER
FAULT
PROTECTION
ZERO
CROSSING
Figure 3. MAX1540/MAX1541 PWM-Controller Functional Diagram
∆I ₌ V_IN - V_OUT
∆t
L
I_PEAK
I_LOAD = I_PEAK/2
0 ON-TIME
TIME
Figure 4. Pulse-Skipping/Discontinuous Crossover Point
(I_OUT < I_LOAD(SKIP)), the output voltage has a DC regu-
lation level higher than the error-comparator threshold
by approximately 1.5% due to slope compensation.
Forced-PWM Mode
The low-noise forced-PWM mode disables the zero-
crossing comparator, which controls the low-side
switch on-time. This forces the low-side gate-drive
waveform to be constantly the complement of the high-
side gate-drive waveform, so the inductor current
reverses at light loads while DH_ maintains a duty fac-
tor of V_{OUT_} / V_IN. The benefit of forced-PWM mode is
to keep the switching frequency fairly constant.
However, forced-PWM operation comes at a cost: the
no-load 5V bias current remains between 4mA to
40mA, depending on the external MOSFETs and
switching frequency.
Forced-PWM mode is most useful for reducing audio-
frequency noise, improving load-transient response,
and providing sink-current capability for dynamic out-
put-voltage adjustment. The MAX1541 uses forced-
PWM operation during all dynamic output-voltage
transitions (GATE transition detected) in order to ensure
fast, accurate transitions. Since forced-PWM operation
disables the zero-crossing comparator, the inductor
current reverses under light loads, quickly discharging
the output capacitors. FBLANK determines how long
the MAX1541 maintains forced-PWM operation—typi-
cally 220µs (FBLANK = V_CC), 140µs (FBLANK = open
or GND), or 65µs (FBLANK = REF).
Current-Limit Protection (ILIM_)
Valley Current Limit
The current-limit circuit employs a unique “valley” cur-
rent-sensing algorithm that uses a current-sense resistor
between CSP_ and CSN_ as the current-sensing ele-
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