MAX1403 Datasheet, PDF (25/36 Pages) Maxim Integrated Products – +3V, 18-Bit, Low-Power, Multichannel, Oversampling Sigma-Delta ADC

+3V, 18-Bit, Low-Power, Multichannel,
Oversampling (Sigma-Delta) ADC
Table 14. R_EXT, C_EXT Values for Less than 16-Bit Gain Error in Buffered (BUFF = 1)
Mode—All Modulator Sampling Frequencies (MF1, MF0 = XX); X2CLK = 0; CLKIN =
2.4576MHz
PGA GAIN
1
C_EXT = 0pF
10
C_EXT = 50pF
10
EXTERNAL RESISTANCE, R_EXT (kΩ)
C_EXT = 100pF C_EXT = 500pF C_EXT = 1000pF
10
10
10
C_EXT = 5000pF
10
2
10
10
10
10
10
10
4
10
10
10
10
10
10
8
10
10
10
10
10
10
16
10
10
10
10
10
10
32
10
10
10
10
10
10
64
10
10
10
10
10
10
128
10
10
10
10
10
10
Reference Input
The MAX1403 is optimized for ratiometric measure-
ments and includes a fully differential reference input.
Apply the reference voltage across REFIN+ and REFIN-,
ensuring that REFIN+ is more positive than REFIN-.
REFIN+ and REFIN- must be between AGND and V+.
The MAX1403 is specified with a +1.25V reference.
Modulator
The MAX1403 performs analog-to-digital conversion
using a single-bit, second-order, switched-capacitor
modulator. A single comparator within the modulator
quantizes the input signal at a much higher sample rate
than the bandwidth of the signal to be converted. The
quantizer then presents a stream of 1s and 0s to the
digital filter for processing, to remove the frequency-
shaped quantization noise.
The MAX1403 modulator provides 2nd-order frequency
shaping of the quantization noise resulting from the sin-
gle bit quantizer. The modulator is fully differential for
maximum signal-to-noise ratio and minimum suscepti-
bility to power-supply noise.
The modulator operates at one of a total of eight differ-
ent sampling rates (f_M) determined by the master clock
frequency (f_CLKIN), the X2CLK bit, the CLK bit, and the
modulator frequency control bits MF1 and MF0. Power
dissipation is optimized for each of these modes by
controlling the bias level of the modulator. Table 15
shows the input and reference sample rates.
PGA
A programmable gain amplifier (PGA) with a user-
selectable gain of x1, x2, x4, x8, x16, x32, x64, or x128
(Table 6) precedes the modulator. Figure 8 shows the
default bipolar transfer function with the following illus-
trated codes: 1) PGA = 0, DAC = 0; 2) PGA = 3, DAC =
0; or 3) PGA = 3, DAC = 3.
Output Noise
Tables 16a and 16b show the rms noise for typical out-
put frequencies (notches) and -3dB frequencies for the
MAX1403 with f_CLKIN = 2.4576MHz. The numbers
given are for the bipolar input ranges with V_REF =
+1.25V, with no buffer (BUFF = 0), and with the buffer
inserted (BUFF = 1). These numbers are typical and
are generated at a differential analog input voltage of 0.
Figure 7 shows graphs of Effective Resolution vs. Gain
and Notch Frequency. The effective resolution values
were derived from the following equation:
Effective Resolution = (SNR_dB - 1.76dB) / 6.02
The maximum possible signal divided by the noise of
the device, SNR_dB, is defined as the ratio of the input
full-scale voltage (i.e., 2 · V_REFIN / GAIN) to the output
rms noise. Note that it is not calculated using peak-to-
peak output noise numbers. Peak-to-peak noise num-
bers can be up to 6.6 times the rms numbers, while
effective resolution numbers based on peak-to-peak
noise can be 2.5 bits below the effective resolution
based on rms noise, as quoted in the tables.
The noise shown in Tables 16a and 16b is composed
of device noise and quantization noise. The device
noise is relatively low, but becomes the limiting noise
source for high gain settings. The quantization noise is
dependent on the notch frequency and becomes the
dominant noise source as the notch frequency is
increased.
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