MAX1565 Datasheet, PDF (24/26 Pages) Maxim Integrated Products – Small, High-Efficiency, Five-Channel Digital Still Camera Power Supply

Small, High-Efficiency, Five-Channel
Digital Still Camera Power Supply
TO BATT
OUTSU
V_OUT
DL
IN
MAX1801 ^OSC
MAX1565
(PARTIAL)
OSC
FB
COMP
REF
REF
GND
DCON
Figure 11. Connecting the MAX1801 Slave PWM Controller to the MAX1565
Using SDOK for Power Sequencing
SDOK goes low when the step-down reaches regula-
tion. Some microcontrollers with low-voltage cores
require that the high-voltage (3.3V) I/O rail not be
powered up until the core has a valid supply. The
circuit in Figure 12 accomplishes this by driving the
gate of a PFET connected between the 3.3V output and
the microcontroller I/O supply. Alternately, power
sequencing may be implemented by connecting RC
networks to the appropriate converter ON_ inputs.
Setting OUTSD Below 1.25V
The step-down feedback voltage is 1.25V when
FBSELSD is high. With a standard two-resistor feed-
back network, the output voltage may be set to values
between 1.25V and the input voltage. If a step-down
output voltage less than 1.25V is desired, it can be set by
adding a third feedback resistor from FB to a voltage
higher than 1.25V (the step-up output is a convenient
voltage for this) as shown in Figure 13.
The equation governing output voltage shown in Figure
13 is:
0 = [(V_SD - V_FBSD)/R1] + [(0 - V_FBSD)/R2]
+ [(V_SU - V_FBSD)/R3]
where V_SD is the output voltage, V_FBSD is 1.25V, and
V_SU is the step-up output voltage. Note that any avail-
able voltage that is higher than 1.25V can be used as
the connection point for R3 in Figure 13 and for the V_SD
term in the equation. Since there are multiple solutions
for R1, R2, and R3, the above equation cannot be writ-
ten in terms of one resistor. The best method for deter-
mining resistor values is to enter the above equation
into a spreadsheet and test estimated resistors’ values.
A good starting point is with 100kΩ at R2 and R3.
MAX1565
(PARTIAL)
OUTSUB
STEP-UP
OUTSUA
LXSU
PGNDB
TO
VBATT
10µH
10µF
3.35V
3.3V
TO
CPU
1MΩ
FBSU
1MΩ
SDOK
INSD
TO VBATT
OR OUTSU
10µF
STEP-DOWN
LXSD
4.7µH
FBSD
PGNDA
VCORE
1.5V
10µF
Figure 12. Using SDOK to Gate 3.3V Power to CPU After the
Core Voltage is OK
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