DS3232M_V1 Datasheet, PDF (21/23 Pages) Maxim Integrated Products – ±5ppm, I2C Real-Time Clock with SRAM

DS3232M
±5ppm, I²C Real-Time Clock with SRAM
Slave Address Byte: Each slave on the I2C bus
responds to a slave address byte sent immediately
following a START condition. The slave address byte
contains the slave address in the most significant 7
bits and the R/W bit in the least significant bit. The
device’s slave address is D0h and cannot be modi-
fied by the user. When the R/W bit is 0 (such as in
D0h), the master is indicating it writes data to the
slave. If R/W = 1 (D1h in this case), the master is
indicating it wants to read from the slave. If an incor-
rect slave address is written, the device assumes the
master is communicating with another I2C device and
ignore the communication until the next START condi-
tion is sent.
Memory Address: During an I2C write operation, the
master must transmit a memory address to identify
the memory location where the slave is to store the
data. The memory address is always the second byte
transmitted during a write operation following the
slave address byte.
I²C Communication
See Figure 10 for an I2C communication example.
Writing a Single Byte to a Slave: The master must
generate a START condition, write the slave address
byte (R/W = 0), write the memory address, write
the byte of data, and generate a STOP condition.
Remember the master must read the slave’s acknowl-
edgment during all byte write operations.
Writing Multiple Bytes to a Slave: To write multiple
bytes to a slave, the master generates a START con-
dition, writes the slave address byte (R/W = 0), writes
the starting memory address, writes multiple data
bytes, and generates a STOP condition.
Reading a Single Byte from a Slave: Unlike the write
operation that uses the specified memory address
byte to define where the data is to be written, the read
operation occurs at the present value of the memory
address counter. To read a single byte from the slave,
the master generates a START condition, writes the
TYPICAL I²C WRITE TRANSACTION
MSB
LSB
MSB
LSB
MSB
LSB
START
1
1
0
1
0
0
0
R/W
SLAVE
ACK
b7
b6
b5
b4
b3
b2
b1
b0
SLAVE
ACK
b7 b6 b5 b4 b3 b2 b1 b0
SLAVE
ACK
STOP
SLAVE
READ/
REGISTER ADDRESS
DATA
ADDRESS
WRITE
EXAMPLE I²C TRANSACTIONS
A) SINGLE BYTE WRITE
-WRITE CONTROL REGISTER
TO 44h
B) SINGLE BYTE READ
-READ CONTROL REGISTER
C) MULTIBYTE WRITE
-WRITE DATE REGISTER
TO "02" AND MONTH
REGISTER TO "11"
D) MULTIBYTE READ
-READ ALARM 2 HOURS
AND DATE VALUES
D0h
0Eh
44h
START
11010000
SLAVE
ACK
00001110
SLAVE
ACK
01000100
SLAVE
ACK
STOP
D0h
0Eh
START
11010000
SLAVE
ACK
00001110
SLAVE
ACK
REPEATED
START
D1h
11010001
SLAVE
ACK
DATA
VALUE
MASTER
NACK
STOP
D0h
04h
02h
START
11010000
SLAVE
ACK
00000100
SLAVE
ACK
00000010
SLAVE
ACK
11h
00010001
SLAVE
ACK
STOP
D0h
0Ch
START
11010000
SLAVE
ACK
00001100
SLAVE
ACK
REPEATED
START
D1h
11010001
SLAVE
ACK
DATA
VALUE
MASTER
ACK
DATA
VALUE
MASTER
NACK
STOP
Figure 10. I²C Transactions
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