DS26524_07 Datasheet, PDF (204/273 Pages) Maxim Integrated Products – Quad T1/E1/J1 Transceiver

DS26524 Quad T1/E1/J1 Transceiver
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
7
BPBSE8
0
TBPBS
Transmit BERT Port Bit Suppress Register
18Bh + (200h x n): where n = 0 to 3, for Ports 1 to 4
6
BPBSE7
0
5
BPBSE6
0
4
BPBSE5
0
3
BPBSE4
0
2
BPBSE3
0
1
BPBSE2
0
0
BPBSE1
0
Bit 7: Transmit Channel Bit 8 Suppress (BPBSE8). MSB of the channel. Set to one to stop this bit from being
used.
Bit 6: Transmit Channel Bit 7 Suppress (BPBSE7). Set to one to stop this bit from being used.
Bit 5: Transmit Channel Bit 6 Suppress (BPBSE6). Set to one to stop this bit from being used.
Bit 4: Transmit Channel Bit 5 Suppress (BPBSE5). Set to one to stop this bit from being used.
Bit 3: Transmit Channel Bit 4 Suppress (BPBSE4). Set to one to stop this bit from being used.
Bit 2: Transmit Channel Bit 3 Suppress (BPBSE3). Set to one to stop this bit from being used.
Bit 1: Transmit Channel Bit 2 Suppress (BPBSE2). Set to one to stop this bit from being used.
Bit 0: Transmit Channel Bit 1 Suppress (BPBSE1). LSB of the channel. Set to one to stop this bit from being
used.
Register Name:
Register Description:
Register Address:
TSYNCC
Transmit Synchronizer Control Register
18Eh + (200h x n): where n = 0 to 3, for Ports 1 to 4
Bit #
7
6
5
4
3
2
1
0
Name
—
—
—
—
—
TSEN
SYNCE RESYNC
—
—
—
—
CRC4
TSEN
SYNCE RESYNC
Default
0
0
0
0
0
0
0
0
Bit 3: CRC-4 Enable (CRC4) (E1 Mode Only).
0 = Do not search for the CRC-4 multiframe word
1 = Search for the CRC-4 multiframe word
Bit 2: Transmit Synchronizer Enable (TSEN).
0 = Transmit synchronizer disabled
1 = Transmit synchronizer enabled
Bit 1: Sync Enable (SYNCE).
0 = auto resync enabled
1 = auto resync disabled
Bit 0: Resynchronize (RESYNC). When toggled from low to high, a resynchronization of the transmit-side framer
is initiated. Must be cleared and set again for a subsequent resync.
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