MAX6852 Datasheet, PDF (20/32 Pages) Maxim Integrated Products – 4-Wire Interfaced, 5 x 7 Matrix Vacuum- Fluorescent Display Controller

4-Wire Interfaced, 5 ✕ 7 Matrix Vacuum-
Fluorescent Display Controller
The multiplex clock frequency determines the multiplex
scan rate and the blink timing. The display scan rate is
{OSC / 400 / (1 + grids register value)}. There are 400
OSC cycles per digit multiplex period. For example,
with OSC = 4MHz, each display digit is enabled for
100µs. For a 40-grid display tube (grids register value
= 39 or 0x27), the display scan rate is 250Hz.
The BLINK output is the selectable blink period clock. It
is nominally 0.5Hz or 1Hz (OSC = 4MHz). It is low dur-
ing the first half of the blink period, and high during the
second half. The PORT0 and PORT1 general-purpose
outputs may be programmed to be BLINK output.
Synchronize the BLINK timing if desired by setting the
T bit in the configuration register (Table 19).
The RC oscillator uses an external resistor R_OSC and
an external capacitor C_OSC to set the oscillator fre-
quency. R_OSC connects from OSC2 to ground. C_OSC
connects from OSC1 to ground. The recommended val-
ues of R_OSC and C_OSC set the oscillator to 4MHz,
which makes the BLINK frequencies 0.5Hz and 1 Hz:
f_OSC = K_F / (R_OSC x [C_OSC + C_STRAY]) MHz
where:
K_F = 2320
R_OSC = external resistor in kΩ (allowable range 8kΩ to
80kΩ)
C_OSC = external capacitor in pF
C_STRAY = stray capacitance from OSC1 to GND in pF,
typically 2pF
For OSC = 4MHz, R_OSC is 10kΩ and C_OSC is 56pF.
The effective value of C_OSC includes not only the actual
external capacitor used, but also the stray capacitance
from OSC1 to GND. This capacitance is usually in the
1pF-to-5pF range, depending on the layout used.
The allowed range of f_OSC is 2MHz to 8MHz. If f_OSC is
set too high, the internal oscillator can stop working. An
internal fail-safe circuit monitors the multiplex clock and
detects a slow or nonworking multiplex clock. When a
slow or nonworking multiplex clock is detected, an
internal fail-safe oscillator generates a replacement
clock of about 200kHz. This backup clock ensures that
the VFD is not damaged by the multiplex operation halt-
ing inadvertently. The scan rate for 16 digits is about
15Hz in fail-safe mode, and the display flickers. A flick-
ering display is a good indication that there is a prob-
lem with the multiplex clock.
Power Supplies
The MAX6852 operates from a single 2.7V to 3.6V
power supply. Bypass the power supply to GND with a
0.1µF capacitor as close to the device as possible. Add
a bulk capacitor (such as a low-cost electrolytic 1µF to
22µF) if the MAX6852 is driving high current from any of
the general-purpose output ports.
Table 8. Memory Mapping of User-Defined Font Register 0x05
COMMAND REGISTER
ADDRESS
DATA
0x85
0x00–0x7F
0x05
0x05
0x00–0x7F
0x80–0xFF
READ OR
WRITE
Read
Write
Write
FUNCTION
Read 7-bit user-definable font data entry from current font address. MSB of the
register data is clear. Font address pointer is incremented after the read.
Write 7-bit user-definable font data entry to current font address. Font address
pointer is incremented after the write.
Write font address pointer with the register data.
Table 9. Font Pointer Address Behavior
FONT POINTER
ADDRESS
ACTION
0x80 to 0xF6
Valid range to set the font address pointer. Pointer autoincrements after a font data read or write, while pointer
address remains in this range.
0xF7
0xF8 to 0xFF
Further font data is ignored after a font data read or write to this pointer address.
Invalid range to set the font address pointer. Pointer is set to 0x80.
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